> On June 24, 2013, 6:17 p.m., Nilay Vaish wrote: > > src/mem/SimpleDRAM.py, line 262 > > <http://reviews.gem5.org/r/1927/diff/2/?file=36306#file36306line262> > > > > I think we should compute tBURST here, instead of simply assigning a > > value.
This could be done, but I believe this should be done in another patch because it is not directly related to what this patch is trying to do. Also, this patch is a pretty big change by itself. Let's submit this patch and then next step could be your suggestion (which is adding bus freq and DRAM freq and make some parameters such as tBURST a function of freq). - Amin ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1927/#review4465 ----------------------------------------------------------- On June 24, 2013, 6:01 a.m., Amin Farmahini wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1927/ > ----------------------------------------------------------- > > (Updated June 24, 2013, 6:01 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > This patch gets rid of bytesPerCacheLine parameter and makes the DRAM > configuration separate from cache line size. > Instead of bytesPerCacheLine, I define a parameter for DRAM called > burst_length. The burst_length parameter shows the length of a DRAM device > burst in bits. > Also, I replace lines_per_rowbuffer with device_rowbuffer_size to improve > code portablity. > > Updates: > - a burst length in beats for each memory type. > - an interface width for each memory type. > - the memory controller model is extended to reason about "system" packets vs > "dram" packets and assemble the responses properly. It means that system > packets larger than a full burst are split into multiple dram packets. > > > Diffs > ----- > > src/mem/simple_dram.cc UNKNOWN > src/mem/simple_dram.hh UNKNOWN > src/mem/SimpleDRAM.py UNKNOWN > > Diff: http://reviews.gem5.org/r/1927/diff/ > > > Testing > ------- > > None > > > Thanks, > > Amin Farmahini > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
