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src/cpu/kvm/x86_cpu.cc <http://reviews.gem5.org/r/2013/#comment4447> It may be needed for a hack, but I think 'forceSegAccessed' or 'markSegAccessed' would be better names src/cpu/kvm/x86_cpu.cc <http://reviews.gem5.org/r/2013/#comment4448> Is this a long-term issue, or is this something that should get fixed (e.g., if our x86 CPU model set these bits properly)? If the former, I'd say there's no need for this message... src/cpu/kvm/x86_cpu.cc <http://reviews.gem5.org/r/2013/#comment4449> Do we have an enum or some typedefs somewhere for these type codes? It would be nice to avoid these hardwired constants. src/cpu/kvm/x86_cpu.cc <http://reviews.gem5.org/r/2013/#comment4446> Looks like some spurious whitespace got added here - Steve Reinhardt On Sept. 10, 2013, 6:35 a.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2013/ > ----------------------------------------------------------- > > (Updated Sept. 10, 2013, 6:35 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 9873:45f1f3674815 > --------------------------- > kvm: x86: Fix segment registers to make them VMX compatible > > There are cases when the segment registers in gem5 are not compatible > with VMX. This changeset works around all known such issues. Specifically: > > * The accessed bits in CS, SS, DD, ES, FS, GS are forced to 1. > * The busy bit in TR is forced to 1. > * The protection level of SS is forced to the same protection level as > CS. The difference /seems/ to be caused by a bug in gem5's x86 > implementation. > > *** > This patch is a part of series of changes to add support for KVM on x86. See > https://github.com/andysan/gem5/tree/kvm-x86 for the full series. > > > Diffs > ----- > > src/cpu/kvm/x86_cpu.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/2013/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
