> On Sept. 19, 2013, 12:30 a.m., Steve Reinhardt wrote: > > src/cpu/kvm/x86_cpu.cc, line 726 > > <http://reviews.gem5.org/r/2013/diff/1/?file=37561#file37561line726> > > > > It may be needed for a hack, but I think 'forceSegAccessed' or > > 'markSegAccessed' would be better names
Renamed to forceSegAccessed. > On Sept. 19, 2013, 12:30 a.m., Steve Reinhardt wrote: > > src/cpu/kvm/x86_cpu.cc, line 729 > > <http://reviews.gem5.org/r/2013/diff/1/?file=37561#file37561line729> > > > > Is this a long-term issue, or is this something that should get fixed > > (e.g., if our x86 CPU model set these bits properly)? If the former, I'd > > say there's no need for this message... After reading more about how the accessed bit is used on x86, this seems to be a VMX limitation rather than a CPU model bug. I'll remove the warning. > On Sept. 19, 2013, 12:30 a.m., Steve Reinhardt wrote: > > src/cpu/kvm/x86_cpu.cc, line 767 > > <http://reviews.gem5.org/r/2013/diff/1/?file=37561#file37561line767> > > > > Do we have an enum or some typedefs somewhere for these type codes? It > > would be nice to avoid these hardwired constants. We have unions defined for whole segment descriptors, but not for the type field separately. I'll make these into separate defines (similar to some of the IO addresses we need in the KVM CPU). I think that's a better solution than breaking out the type subunion from the SegDescriptor bitunion since they are referred to by number in the VMX documentation. > On Sept. 19, 2013, 12:30 a.m., Steve Reinhardt wrote: > > src/cpu/kvm/x86_cpu.cc, line 799 > > <http://reviews.gem5.org/r/2013/diff/1/?file=37561#file37561line799> > > > > Looks like some spurious whitespace got added here Fixed. - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2013/#review4707 ----------------------------------------------------------- On Sept. 10, 2013, 3:35 p.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2013/ > ----------------------------------------------------------- > > (Updated Sept. 10, 2013, 3:35 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 9873:45f1f3674815 > --------------------------- > kvm: x86: Fix segment registers to make them VMX compatible > > There are cases when the segment registers in gem5 are not compatible > with VMX. This changeset works around all known such issues. Specifically: > > * The accessed bits in CS, SS, DD, ES, FS, GS are forced to 1. > * The busy bit in TR is forced to 1. > * The protection level of SS is forced to the same protection level as > CS. The difference /seems/ to be caused by a bug in gem5's x86 > implementation. > > *** > This patch is a part of series of changes to add support for KVM on x86. See > https://github.com/andysan/gem5/tree/kvm-x86 for the full series. > > > Diffs > ----- > > src/cpu/kvm/x86_cpu.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/2013/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
