----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2208/#review4979 -----------------------------------------------------------
src/mem/ruby/system/DMASequencer.hh <http://reviews.gem5.org/r/2208/#comment4590> Coming back to a previous discussion, is this really needed? Should not the src/dst be enough? src/mem/ruby/system/DMASequencer.cc <http://reviews.gem5.org/r/2208/#comment4588> why dynamically allocated? src/mem/ruby/system/DMASequencer.cc <http://reviews.gem5.org/r/2208/#comment4589> Is this really needed? - Andreas Hansson On March 12, 2014, 6:54 p.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2208/ > ----------------------------------------------------------- > > (Updated March 12, 2014, 6:54 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10117:1e75590bebef > --------------------------- > ruby: dma sequencer: remove RubyPort as parent class > As of now DMASequencer inherits from the RubyPort class. But the code in > RubyPort > class is heavily tailored for the CPU Sequencer. There are parts of the code > that > are not required at all for the DMA sequencer. Moreover, the next patch uses > the > dma sequencer for carrying out memory accesses for all the io devices. > Hence, it > is better to have a leaner dma sequencer. > > > Diffs > ----- > > src/mem/ruby/system/DMASequencer.hh fd90d9e55e5c > src/mem/ruby/system/DMASequencer.cc fd90d9e55e5c > src/mem/ruby/system/Sequencer.py fd90d9e55e5c > > Diff: http://reviews.gem5.org/r/2208/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
