> On July 28, 2014, 12:34 a.m., Andreas Hansson wrote: > > Thanks for the input Amin. One high-level question: what is the main aim of > > the patch? Until now we have tried to keep the timing constraints to a > > minimum (without sacrificing fidelity). In general you could argue that > > tBURST can be used, rather than adding tCCD and then taking the max. Do you > > envision any use-cases where this is not the case?
Yes, generally you can use tBUSRT without sacrificing accuracy since usually tBURST >= tCCD. But in DDR4 tBURST could be smaller than tCCD. For example, in DDR4-2400-17-17-17 model in gem5, Samsung K4A4G085WD, tCCD_S is 4 cycles (3.33ns) and tCCD_L is 6 cycles (5.0ns). So the average tCCD is 4.16ns, whereas tBURST is 3.33ns. Also, we have internally developed some DRAM architectures where tBURST is smaller than tCCD. So in those cases taking the max increases accuracy. Anyways, I don't mind at all if you would like to ignore tCCD to keep the timing constraints to a minimum. That makes sense. - Amin ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2316/#review5228 ----------------------------------------------------------- On July 23, 2014, 10:16 p.m., Amin Farmahini wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2316/ > ----------------------------------------------------------- > > (Updated July 23, 2014, 10:16 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > This patch adds support for tCCD to the DRAM controller. > After changeset 10211: e084db2b1527 (Merge DRAM latency calculation and bank > state update), DRAM latency calculations has changed and that changeset > provides a rather simple way to incorporate the tCCD parameter into latency > calculations. > > > Diffs > ----- > > src/mem/DRAMCtrl.py UNKNOWN > src/mem/dram_ctrl.hh UNKNOWN > src/mem/dram_ctrl.cc UNKNOWN > > Diff: http://reviews.gem5.org/r/2316/diff/ > > > Testing > ------- > > None > > > Thanks, > > Amin Farmahini > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
