[gem5-dev] changeset in gem5: cpu: fix system total instructions accounting

[Nikos Nikoleris]

changeset 68d688cbe26c in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=68d688cbe26c
description:
        cpu: fix system total instructions accounting

        The totalInstructions counter is only incremented when the whole 
instruction is
        commited and not on every microop. It was incorrectly reset in atomic 
and
        timing cpus.

        Committed by: Nilay Vaish <ni...@cs.wisc.edu>"

diffstat:

 src/cpu/minor/execute.cc |  10 +++++-----
 src/cpu/o3/cpu.cc        |  10 +++++-----
 src/cpu/simple/atomic.cc |   2 --
 src/cpu/simple/timing.cc |   2 --
 4 files changed, 10 insertions(+), 14 deletions(-)

diffs (73 lines):

diff -r 16643e7b322a -r 68d688cbe26c src/cpu/minor/execute.cc
--- a/src/cpu/minor/execute.cc  Fri Apr 03 11:42:10 2015 -0500
+++ b/src/cpu/minor/execute.cc  Fri Apr 03 11:42:10 2015 -0500
@@ -840,15 +840,15 @@
         thread->numInst++;
         thread->numInsts++;
         cpu.stats.numInsts++;
+        cpu.system->totalNumInsts++;
+
+        /* Act on events related to instruction counts */
+        
cpu.comInstEventQueue[inst->id.threadId]->serviceEvents(thread->numInst);
+        cpu.system->instEventQueue.serviceEvents(cpu.system->totalNumInsts);
     }
     thread->numOp++;
     thread->numOps++;
     cpu.stats.numOps++;
-    cpu.system->totalNumInsts++;
-
-    /* Act on events related to instruction counts */
-    cpu.comInstEventQueue[inst->id.threadId]->serviceEvents(thread->numInst);
-    cpu.system->instEventQueue.serviceEvents(cpu.system->totalNumInsts);
 
     /* Set the CP SeqNum to the numOps commit number */
     if (inst->traceData)
diff -r 16643e7b322a -r 68d688cbe26c src/cpu/o3/cpu.cc
--- a/src/cpu/o3/cpu.cc Fri Apr 03 11:42:10 2015 -0500
+++ b/src/cpu/o3/cpu.cc Fri Apr 03 11:42:10 2015 -0500
@@ -1440,16 +1440,16 @@
         thread[tid]->numInst++;
         thread[tid]->numInsts++;
         committedInsts[tid]++;
+        system->totalNumInsts++;
+
+        // Check for instruction-count-based events.
+        comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
+        system->instEventQueue.serviceEvents(system->totalNumInsts);
     }
     thread[tid]->numOp++;
     thread[tid]->numOps++;
     committedOps[tid]++;
 
-    system->totalNumInsts++;
-    // Check for instruction-count-based events.
-    comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
-    system->instEventQueue.serviceEvents(system->totalNumInsts);
-
     probeInstCommit(inst->staticInst);
 }
 
diff -r 16643e7b322a -r 68d688cbe26c src/cpu/simple/atomic.cc
--- a/src/cpu/simple/atomic.cc  Fri Apr 03 11:42:10 2015 -0500
+++ b/src/cpu/simple/atomic.cc  Fri Apr 03 11:42:10 2015 -0500
@@ -168,8 +168,6 @@
         _status = BaseSimpleCPU::Idle;
         notIdleFraction = 0;
     }
-
-    system->totalNumInsts = 0;
 }
 
 bool
diff -r 16643e7b322a -r 68d688cbe26c src/cpu/simple/timing.cc
--- a/src/cpu/simple/timing.cc  Fri Apr 03 11:42:10 2015 -0500
+++ b/src/cpu/simple/timing.cc  Fri Apr 03 11:42:10 2015 -0500
@@ -94,8 +94,6 @@
       fetchEvent(this), drainManager(NULL)
 {
     _status = Idle;
-
-    system->totalNumInsts = 0;
 }
 
 
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