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Ship it! src/mem/cache/tags/base.hh (line 205) <http://reviews.gem5.org/r/2963/#comment5919> CacheBlk *find... src/mem/cache/tags/base_set_assoc.hh (line 176) <http://reviews.gem5.org/r/2963/#comment5920> CacheBlk *find... src/mem/cache/tags/fa_lru.hh (line 264) <http://reviews.gem5.org/r/2963/#comment5921> CacheBlk *find... - Nilay Vaish On July 28, 2015, 10:15 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2963/ > ----------------------------------------------------------- > > (Updated July 28, 2015, 10:15 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10940:837cdbf13ea3 > --------------------------- > mem: Make caches way aware > > This patch makes cache sets aware of the way number. This enables > some nice features such as the ablity to restrict way allocation. The > implemented mechanism allows to set a maximum way number to be > allocated 'k' which must fulfill 0 < k <= N (where N is the number of > ways). In the future more sophisticated mechasims can be implemented. > > > Diffs > ----- > > src/mem/cache/blk.hh acd48ddd725f > src/mem/cache/tags/lru.cc acd48ddd725f > src/mem/cache/tags/random_repl.cc acd48ddd725f > src/mem/cache/tags/fa_lru.hh acd48ddd725f > src/mem/cache/tags/fa_lru.cc acd48ddd725f > src/mem/cache/tags/base.hh acd48ddd725f > src/mem/cache/tags/base_set_assoc.hh acd48ddd725f > src/mem/cache/tags/base_set_assoc.cc acd48ddd725f > src/mem/cache/cache_impl.hh acd48ddd725f > > Diff: http://reviews.gem5.org/r/2963/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
