Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32922 )
Change subject: arch: Eliminate an unused pair of constants from
isa_traits.hh.
......................................................................
arch: Eliminate an unused pair of constants from isa_traits.hh.
The one questionable use of CurThreadInfoImplemented (always false) and
CurThreadInfoReg (always -1) has been eliminated, making these constants
unnecessary.
Change-Id: Ibfe4f7be7ce5aaf9c5e896146e1b05b3ac752305
---
M src/arch/arm/isa_traits.hh
M src/arch/mips/isa_traits.hh
M src/arch/power/isa_traits.hh
M src/arch/riscv/isa_traits.hh
M src/arch/sparc/isa_traits.hh
M src/arch/x86/isa_traits.hh
6 files changed, 0 insertions(+), 18 deletions(-)
diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index c9b6eb9..0ce38bc 100644
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -95,9 +95,6 @@
// Memory accesses cannot be unaligned
const bool HasUnalignedMemAcc = true;
- const bool CurThreadInfoImplemented = false;
- const int CurThreadInfoReg = -1;
-
enum InterruptTypes
{
INT_RST,
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 5d20f7c..9b44d86 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -138,9 +138,6 @@
const bool HasUnalignedMemAcc = true;
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
} // namespace MipsISA
#endif // __ARCH_MIPS_ISA_TRAITS_HH__
diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 25499ff..89bfa6b 100644
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -57,9 +57,6 @@
// Memory accesses can be unaligned
const bool HasUnalignedMemAcc = true;
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
} // namespace PowerISA
#endif // __ARCH_POWER_ISA_TRAITS_HH__
diff --git a/src/arch/riscv/isa_traits.hh b/src/arch/riscv/isa_traits.hh
index 18cf485..8ba2e0c 100644
--- a/src/arch/riscv/isa_traits.hh
+++ b/src/arch/riscv/isa_traits.hh
@@ -57,9 +57,6 @@
// Memory accesses can be unaligned (at least for double-word memory
accesses)
const bool HasUnalignedMemAcc = true;
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
}
#endif //__ARCH_RISCV_ISA_TRAITS_HH__
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 3cd6216..7989107 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -47,9 +47,6 @@
// Memory accesses cannot be unaligned
const bool HasUnalignedMemAcc = false;
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
}
#endif // __ARCH_SPARC_ISA_TRAITS_HH__
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 7f55145..98a2dc8 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -52,9 +52,6 @@
// Memory accesses can be unaligned
const bool HasUnalignedMemAcc = true;
-
- const bool CurThreadInfoImplemented = false;
- const int CurThreadInfoReg = -1;
}
#endif // __ARCH_X86_ISATRAITS_HH__
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibfe4f7be7ce5aaf9c5e896146e1b05b3ac752305
Gerrit-Change-Number: 32922
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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