Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/51232 )
Change subject: cpu: Eliminate the (get|set)RegFlat methods.
......................................................................
cpu: Eliminate the (get|set)RegFlat methods.
These can now be performed with the (reg|set)Reg methods by using an
already flattened RegId.
Change-Id: Ie02cda224d96644061227eada100675d38797e57
---
M src/cpu/simple_thread.hh
M src/cpu/thread_context.cc
M src/cpu/thread_context.hh
M src/cpu/checker/thread_context.hh
4 files changed, 12 insertions(+), 150 deletions(-)
diff --git a/src/cpu/checker/thread_context.hh
b/src/cpu/checker/thread_context.hh
index 7cb95f5..3cb97a3 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -342,38 +342,6 @@
actualTC->setStCondFailures(sc_failures);
}
- RegVal
- getRegFlat(const RegId ®) const override
- {
- return actualTC->getRegFlat(reg);
- }
-
- void
- getRegFlat(const RegId ®, void *val) const override
- {
- actualTC->getRegFlat(reg, val);
- }
-
- void *
- getWritableRegFlat(const RegId ®) override
- {
- return actualTC->getWritableRegFlat(reg);
- }
-
- void
- setRegFlat(const RegId ®, RegVal val) override
- {
- actualTC->setRegFlat(reg, val);
- checkerTC->setRegFlat(reg, val);
- }
-
- void
- setRegFlat(const RegId ®, const void *val) override
- {
- actualTC->setRegFlat(reg, val);
- checkerTC->setRegFlat(reg, val);
- }
-
// hardware transactional memory
void
htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause)
override
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index a6b61b6..3ce225b 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -398,21 +398,6 @@
return val;
}
- RegVal
- getRegFlat(const RegId ®) const override
- {
- const RegIndex idx = reg.index();
-
- const auto ®_file = regFiles[reg.classValue()];
- const auto ®_class = reg_file.regClass;
-
- assert(idx < reg_file.size());
- RegVal val = reg_file.reg(idx);
- DPRINTFV(reg_class.debug(), "Reading %s reg %d as %#x.\n",
- reg.className(), idx, val);
- return val;
- }
-
void
getReg(const RegId &arch_reg, void *val) const override
{
@@ -429,19 +414,6 @@
reg_class.valString(val));
}
- void
- getRegFlat(const RegId ®, void *val) const override
- {
- const RegIndex idx = reg.index();
-
- const auto ®_file = regFiles[reg.classValue()];
- const auto ®_class = reg_file.regClass;
-
- reg_file.get(idx, val);
- DPRINTFV(reg_class.debug(), "Reading %s register %d as %s.\n",
- reg.className(), idx, reg_class.valString(val));
- }
-
void *
getWritableReg(const RegId &arch_reg) override
{
@@ -452,15 +424,6 @@
return reg_file.ptr(idx);
}
- void *
- getWritableRegFlat(const RegId ®) override
- {
- const RegIndex idx = reg.index();
- auto ®_file = regFiles[reg.classValue()];
-
- return reg_file.ptr(idx);
- }
-
void
setReg(const RegId &arch_reg, RegVal val) override
{
@@ -480,22 +443,6 @@
}
void
- setRegFlat(const RegId ®, RegVal val) override
- {
- const RegIndex idx = reg.index();
-
- auto ®_file = regFiles[reg.classValue()];
- const auto ®_class = reg_file.regClass;
-
- if (reg.is(InvalidRegClass))
- return;
-
- DPRINTFV(reg_class.debug(), "Setting %s register %d to %#x.\n",
- reg.className(), idx, val);
- reg_file.reg(idx) = val;
- }
-
- void
setReg(const RegId &arch_reg, const void *val) override
{
const RegId reg = flattenRegId(arch_reg);
@@ -511,19 +458,6 @@
reg_file.set(idx, val);
}
- void
- setRegFlat(const RegId ®, const void *val) override
- {
- const RegIndex idx = reg.index();
-
- auto ®_file = regFiles[reg.classValue()];
- const auto ®_class = reg_file.regClass;
-
- DPRINTFV(reg_class.debug(), "Setting %s register %d to %s.\n",
- reg.className(), idx, reg_class.valString(val));
- reg_file.set(idx, val);
- }
-
// hardware transactional memory
void htmAbortTransaction(uint64_t htm_uid,
HtmFailureFaultCause cause) override;
diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index e0ebaf3..5172dbb 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -177,38 +177,6 @@
setReg(reg, &val);
}
-RegVal
-ThreadContext::getRegFlat(const RegId ®) const
-{
- RegVal val;
- getReg(reg, &val);
- return val;
-}
-
-void
-ThreadContext::getRegFlat(const RegId ®, void *val) const
-{
- getReg(reg, val);
-}
-
-void *
-ThreadContext::getWritableRegFlat(const RegId ®)
-{
- return getWritableReg(reg);
-}
-
-void
-ThreadContext::setRegFlat(const RegId ®, RegVal val)
-{
- setReg(reg, &val);
-}
-
-void
-ThreadContext::setRegFlat(const RegId ®, const void *val)
-{
- setReg(reg, val);
-}
-
void
serialize(const ThreadContext &tc, CheckpointOut &cp)
{
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 04c658d..6d4397a 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -242,26 +242,6 @@
/** function to compare two thread contexts (for debugging) */
static void compare(ThreadContext *one, ThreadContext *two);
- /** @{ */
- /**
- * Flat register interfaces
- *
- * Some architectures have different registers visible in
- * different modes. Such architectures "flatten" a register (see
- * flattenRegId()) to map it into the
- * gem5 register file. This interface provides a flat interface to
- * the underlying register file, which allows for example
- * serialization code to access all registers.
- */
-
- virtual RegVal getRegFlat(const RegId ®) const;
- virtual void getRegFlat(const RegId ®, void *val) const;
- virtual void *getWritableRegFlat(const RegId ®);
-
- virtual void setRegFlat(const RegId ®, RegVal val);
- virtual void setRegFlat(const RegId ®, const void *val);
- /** @} */
-
// hardware transactional memory
virtual void htmAbortTransaction(uint64_t htm_uid,
HtmFailureFaultCause cause) = 0;
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/51232
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie02cda224d96644061227eada100675d38797e57
Gerrit-Change-Number: 51232
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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