The change is simple enough that I'll just describe it. This deals solely with the simple CPU, so if your trying to use O3, for example, it won't help you directly. The code here: http://repo.m5sim.org/m5/file/886da6fa6d4a/src/cpu/simple/base.cc#l307 should return if the thread is suspended -or- unallocated. After you change that, I think you'll also run into an assert in the CPU. I just got rid of the assert and haven't had any problems, but that might not be the right thing to do.
Gabe Quoting Polina Dudnik <pdud...@gmail.com>: > Oh, I see. Do you think you can distribute the partial patch you have? > > Thank you. > > Polina > > On Thu, Mar 5, 2009 at 4:48 PM, Gabriel Michael Black <gbl...@eecs.umich.edu >> wrote: > >> Quoting Polina Dudnik <pdud...@gmail.com>: >> >> > On Thu, Mar 5, 2009 at 3:38 PM, Gabriel Michael Black < >> gbl...@eecs.umich.edu >> >> wrote: >> > >> >> There's actually a bug in the CPU wakeup code which prevents any CPU >> >> that isn't activated and then suspended, like SPARCs APs which are >> >> suspended directly, from waking up on interrupts, etc. I have a >> >> partial fix which I've been using to work around the problem, but we >> >> need to come up with a full solution. I don't know if this is what the >> >> problem is, but it sounds like it could be. >> >> >> >> Gabe >> > >> > >> > Are you talking about the seg fault in m5-stable that I get? Or the CPU >> ids? >> > >> > Polina >> > >> > >> >> I was talking about the hang Ali described. If the BP is waiting for >> an AP to tell it it's alive and the AP never wakes up, the system will >> likely hang. I ran into that problem in X86_FS. >> >> Gabe >> >> _______________________________________________ >> m5-dev mailing list >> m5-dev@m5sim.org >> http://m5sim.org/mailman/listinfo/m5-dev >> > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
