> On 2011-01-27 07:02:13, Korey Sewell wrote: > > src/cpu/inorder/resources/branch_predictor.cc, line 87 > > <http://reviews.m5sim.org/r/449/diff/1/?file=10108#file10108line87> > > > > Right here, we are trying to set the default not-taken path of the > > branch. > > > > We do this, because The Branch Predictor will only update the PCState > > if it's a taken branch... > > > > Is that violating how you (Gabe) intending PCState to work?
It gets a little muddy because the branch predictors still have an idea of taken and not taken, and that's ill defined with branch delay slots. If you define "not taken" as continuing execution with the next instruction, branches may never not be taken because they either go to a different target or skip an instruction. I don't remember exactly how this worked out in O3 for SPARC but you could look at that to get an idea of what's going on. Even though O3 doesn't make special accomadations for branch delay slots and annulling, doing things that way gave significantly better simulated performance than trying to handle things directly. - Gabe ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/449/#review808 ----------------------------------------------------------- On 2011-01-25 16:04:38, Korey Sewell wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/449/ > ----------------------------------------------------------- > > (Updated 2011-01-25 16:04:38) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > inorder: pcstate and delay slots bug > For ISAs with delay slots, not taken branches were not being advanced > correctly to pc+8, so for those ISAs > we 'advance()' the pcstate one more time for the desired effect > > > Diffs > ----- > > src/cpu/inorder/resources/branch_predictor.cc 31a04e5ac4be > src/cpu/inorder/resources/fetch_seq_unit.cc 31a04e5ac4be > > Diff: http://reviews.m5sim.org/r/449/diff > > > Testing > ------- > > > Thanks, > > Korey > >
_______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
