Hi Nathanaël,
I just posted some code that should address both the issues you found. I haven't tested it yet, but let me know what you find. http://reviews.gem5.org/r/1376/ Thanks, Ali On 28.08.2012 12:01, Ali Saidi wrote: > Hi Nathanaël, > > Sent from my ARM powered mobile device > > On Aug 28, 2012, at 11:34 AM, Nathanaël Prémillieu <nprem...@irisa.fr> wrote: > >> Hi Ali, Thank for your response. I was thinking that data instructions as branch was a specificity of ARMv7. In The ARM Architecture Reference Manual, p. 170, it is stated that: "In ARMv7, a processor in ARM state can also enter Thumb state (and change to executing Thumb instructions) by executing an ADC, ADD, AND, ASR, BIC, EOR, LSL, LSR, MOV, MVN, ORR, ROR, RRX, RSB, RSC, SBC, or SUB instruction that has the PC as destination register and does not set the condition flags." I don't currently know if it happens a lot and if it is responsible for a significative part of the detected mispredictions. I will send some update when I will have numbers. > > Thanks for looking into it and please let us know. Looking at the reference manual it appears as though I wasnt quite correct. See table D4 in version 406B of the manual or I5 in version 406C. It seems like we're missing a few that aren't deprecated. > >> I have started to modify the src/arch/arm/isa/insts/data.isa file and it seems to work. For the load instructions, LOAD_REG_AN_PN_SN_UN_WN_SZ4, LOAD_IMM_AN_PN_SN_UN_WN_SZ4, LOAD_REG_AY_PN_SN_UN_WN_SZ4 and LOAD_IMM_AY_PN_SN_UN_WN_SZ4 are not split in two and the control flag is not set when it is necessary. > > Hrm. This is probably a bug. > > Thanks, > > Ali > gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [9] Links: ------ [1] mailto:gem5-users@gem5.org [2] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [3] mailto:gem5-users@gem5.org [4] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [5] mailto:gem5-users@gem5.org [6] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [7] mailto:gem5-users@gem5.org [8] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [9] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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