Hello Jason:
Comparing resource stalls to model banking with "real banking",
(1) I think the biggest difference is that the former does not implement a port
for each bank, is it right?
(2) I have read MOESI_AMD_Base-corepaire.sm that you have mentioned, during the
implementing L0 multi-bank, I have doubt whether need to add L1 RequestType?
(In part of the transition of L0cache, the tagarray or dataarray of L1 should
be accessed?)
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enumeration(RequestType, desc="To communicate stats from transitions to
recordStats") {
IDataArrayRead, desc="Read the data array";
IDataArrayWrite, desc="Write the data array";
ITagArrayRead, desc="Read the data array";
ITagArrayWrite, desc="Write the data array";
DDataArrayRead, desc="Read the data array";
DDataArrayWrite, desc="Write the data array";
DTagArrayRead, desc="Read the data array";
DTagArrayWrite, desc="Write the data array";
____________________________________________________________
for example, should I add L1DataArrayRead ?
Looking forward to your reply.
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