> On 28 Jul 2016, at 2:08 am, Patrick Lehmann <patrick.lehm...@tu-dresden.de>
> wrote:
>
> Hmmm 9.5
>
> I must have missed the point that universal_expressions are also bound by
> "normal" integers/implementation restrictions....
It's common believe me.
> But how does it relate to some mailing list replies, where someone stated:
> it's already possible to define larger integers or physical types, if the
> tool supports it. But no tool, which I know of, has an INTEGER which is
> bigger than (1s compl.) 32-bit? Is there some destination between the INTEGER
> type from STD and the internal biggest supported integer representation?
I used to widely describe VHDL as a skill acquired by the journeyman system.
VHDL's original masters are no longer practicing and the demand for new
implementations is low.
When the universal integer is larger than 32 bits and the restriction is
overlooked by the VHDL journeyman on his way to the proof of mastery - an
implementation, you can get the mistake. The size of universal integer isn't
knowable from the VHDL language and reflects something of the programming
platform used for the implementation. That programming language type may be
shared with a larger predefined physical type (64 bit TIME). There can also be
schism - acting on belief or fomenting change.
Constraints on portability serve as barriers to harm in this case. We used to
search out these sort of 'synthetic programming' opportunities in VHDL until
the -1993 revision closed off so many avenues in search of achieving functional
notation supporting formal notation for hardware description.
You'd be surprised what you can do with a few semantic restrictions dropped and
that would be implementation dependent. The VHDL language became less ambiguous
and incidentally harder to implement while better defined for portability.
There are no checklists, or publicly available accurate and complete test
suites. The LRM has to be embraced with the fervor of a lawyer studying the
law. There are no authoritative works the equivalent of a 'Patry on Copyrights'
teaching implementation, the market for perspective masters is too small. As in
law every word in the standard describing VHDL has meaning and understanding
that meaning of a collection of these words means understanding the words and
implications.
It's basically epistemology. And we do see the collision of belief and
knowledge. Your reference to 'someone' doesn't pass epistemological muster, do
you have citations and text? Are those authoritative? And you can still get
someone popping out of the bushes with a copy of the standard ready to
demonstrate otherwise. Likewise your authority can change their tune when their
knowledge (awareness) of the standard evolves. They maybe promoting change
intentionally or simply be mistaken. Their writing may be taken out of context,
a strawman...
The reason no one has a bigger INTEGER is because none of the synthesis tools
support it. That should demonstrate that changes to the standard need consensus
of all involved as well as questioning the need for bigger integers
epistemologically. Hopefully separating cold logic from hot politics (or market
share).
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