>Well, I suppose it depends on the implementation.
>My understanding of low-level hardware design stops at
>the "basic theory" point, and not much of that. But I am
>curious: How does the hardware "watch" a memory location
>without incurring any overhead? It would seem to me that
>there must be some sort of cost involved.
You're correct insofar as there is definitely furious
activity involved in tracking references to memory.
However, this is activity that all modern processors are
already engaged in for the purposes of cache management and
such (Dcache, Icache, TLB, etc) so rigging these subsystems
to generate an exception whenever a (relatively cheap,
silicon-wise) recognizer sees an address go flying by is
not really much additional expense.
*****************************************************************
To unsubscribe from this list, send mail to [EMAIL PROTECTED]
with the text 'unsubscribe gnhlug' in the message body.
*****************************************************************
