On Wed, 26 Jun 2002, at 10:01am, Michael O'Donnell wrote: > However, this is activity that all modern processors are already engaged > in for the purposes of cache management and such (Dcache, Icache, TLB, > etc) so rigging these subsystems to generate an exception whenever a > (relatively cheap, silicon-wise) recognizer sees an address go flying by > is not really much additional expense.
Ah ha! I see (said the blind man). Thanks for the nice explanation. -- Ben Scott <[EMAIL PROTECTED]> | The opinions expressed in this message are those of the author and do not | | necessarily represent the views or policy of any other person, entity or | | organization. All information is provided without warranty of any kind. | ***************************************************************** To unsubscribe from this list, send mail to [EMAIL PROTECTED] with the text 'unsubscribe gnhlug' in the message body. *****************************************************************
