> PCI slots each have four interrupt lines assigned to them -- INT A,
> B, C, and D. Those interrupt lines are connected to a component
> called an APIC (Advanced Programmable Interrupt Controller),
> which routes the PCI interrupts to the interrupt pins on the
> microprocessor. The routing between slots, CPUs, and APICs is
> entirely dependent on the particular motherboard you happen to have,
> and the capabilities of the APIC.
PCI is slightly more baroque than that - a PCI card
has 4 "pins" (int1, int2, int3 and int4) that it can
use for generating interrupt requests and (IIRC) the
rule is that a card is free to use no pins, but if it
uses any pins then int1 must be one of them and (IIRC)
int1 is considered to be "primary" in some respects.
So much for the card; there are (as Ben said) also 4
PCI interrupt request lines (A,B,C and D) which are
wired to the *slots* in a pattern that is officially
known as the "swizzle", being something like this:
ABCD
BCDA
CDAB
DABC
ABCD
.
.
.
...the point being that the interrupt request line
that ends up being yanked by a PCI card's int1 (and
int2, etc) is very much slot-dependent.
Since implementation of a PCI controller is up to
the vendor it's theoretically possible that some
el-cheapo PCI controller could just route all 4
interrupt request lines to a single input in the
Programmable Interrupt Controller (PIC), but A,B,C and
D are usually routed to individual PIC inputs, thus
providing *some* measure of configurability/control.
So, if one request line is too busy, you might
get lucky by moving the card to a different slot...
Regards,
----------------------------------------
Michael O'Donnell [EMAIL PROTECTED]
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