Hi Todd,
Just a guess but if you look in SYSLOG or OPERLOG I think you will in
find the WTO was recorded there and processed by automation in a timely
fashion. The actual JOBLOG update is probably sitting in a JES2 buffer
just not flushed out.
Best Regards,
Sam Knutson, GEICO
Performance and Availability Management
mailto:[EMAIL PROTECTED]
(office) 301.986.3574
"Think big, act bold, start simple, grow fast..."
-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[EMAIL PROTECTED] On
Behalf Of Todd Burch
Sent: Friday, April 14, 2006 8:52 AM
To: [email protected]
Subject: Certain WTOs are slow to externalize
Here's an interesting phenomenon that perhaps some of you have observed,
or maybe not. I've observed it when running in SRB mode and specifying
LINKAGE=BRANCH when using WTOs for messaging. Perhaps someone can
explain what is going on here.
For situtation #1, my app is running in SRB mode, it physically resides
in ECSA, supervistor state, key 0. I needed to do some debugging and
added some strategically placed WTOs. It's a fast running process and
many times
the WTOs would never externalize. I finally figured out that if coded
SYNCH=YES on the WTO, I would see the WTOs in the job output. However,
issuing the WTO with SYNCH=YES caused the app to run doggggy slow, and I
mean REALLY slooooooow.
Situation #2 is similar. I'm testing z/XDC 1.7 SRB mode support, and I
coded up a simple SRB, run it in batch, forced it to abend. I then got
control with z/XDC and starting stepping through my retry code. I
traced around a WTO LINKAGE=BRANCH, jumped over to my other session to
browse the
output (SDSF "DA"), but the WTO had not shown up. I stepped through
code
for a couple more minutes, exited the debugging session and then
cancelled the job. I did not see the WTO in the job output until I
cancelled the job.
So my question is, why does it take so long for the WTO to externalize?
Thanks, Todd
(By the way, the z/XDC testing is going great. I can't remember how
many years I wanted a debugger for SRB mode... Well, maybe I can... 15.
Picture yourself instruction stepping through code, in supervisor state,
key 0, SRB
mode, in an EUT=YES FRR, full cross memory mode. It's amazing. Thanks
Dave!)
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