Binyamin Dissen wrote:
Usually instructions that cause stalls or delays are documented in the POPs.
I wish that were true. Unfortunately, stalls and delays are almost never discussed in PoPs. For example, general purpose registers can be used for addressing. Therefore, every instruction that sets a general purpose register has the potential to stall/delay the pipeline due to Address Generation Interlock (AGI). There are special bypasses for LOAD and LOAD ADDRESS that reduce AGI. None of this is documented in PoPs.
For more information, see the following SHARE presentation and the other articles and presentations to which its bibliography refers.
http://shareew.prod.web.sba.com/client_files/callpapers/attach/SHARE_in_Baltimore/S8192DB073718.pdf -- Edward E Jaffe Phoenix Software International, Inc 5200 W Century Blvd, Suite 800 Los Angeles, CA 90045 310-338-0400 x318 [EMAIL PROTECTED] http://www.phoenixsoftware.com/ ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
