Alan Altmark wrote:
On Mon, 1 Dec 2008 14:24:11 -0500, Shmuel Metz (Seymour J.)
<[EMAIL PROTECTED]> wrote:
Were IBM to document it, the timing manual for any of the current
processors would be immense.
Nah. Page 1: "It depends". Page 2 would be intentionally left blank.
With instruction pipelining, too much depends on what has happened *before*
the instruction in question. From a raw technology perspective, changes in
cache design and memory structure can affect an instruction as well (for good
or ill).
The first several pages would have to explain the pipeline design and
the delays that can occur. After that, specific instruction timings
would have to assume the pipeline is flowing freely.
--
Edward E Jaffe
Phoenix Software International, Inc
5200 W Century Blvd, Suite 800
Los Angeles, CA 90045
310-338-0400 x318
[EMAIL PROTECTED]
http://www.phoenixsoftware.com/
----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO
Search the archives at http://bama.ua.edu/archives/ibm-main.html
