[EMAIL PROTECTED] (John McKown) writes:
> On the current machines, there are two classes of instructions. The
> "simple" instructions (like SR and LA and so forth) are "hard
> wired". The more difficult instructions (such as MVCLE) are
> "millicoded". So, if you can replace a millicoded instruction with a
> small number of "hard wired" instructions, then you should be better
> off, speed wise. However, once again, IBM does not document which
> instructions are "hard coded" and which are millicode. I have heard
> that IBM has, at times, "fixed" a "broken" hard coded instruction by
> replacing it with a millicoded instruction installed by the CE.

An earlier genre was macrocode that was introduced on 5880
.... basically a flavor of modified 370 that ran in special mode. It was
used to implement hypervisor on 5880.

eventually the response on 3090 was pr/sm ... which was a significantly
more complex implementation having to be done in much lower level
microcode. some old email discussing 5880 and MAcro-code
http://www.garlic.com/~lynn/2006b.html#email810318

in this post/thread
http://www.garlic.com/~lynn/2006b.html#38 blast from the past ... macrocode

some of the Amdahl people had talked to me (offline) at baybunch
(monthly meetings held at slac) about macrocode and hypervisor
implementation (year earlier than above email).

the above post also includes another old email mentioning as9000
http://www.garlic.com/~lynn/2006b.html#email810421

for other topic drift ... here is old discussion about difference
between 3081 and 3090 with respect to hardware/microcode implementation
tradeoff (with examples regarding SIE instruction):
http://www.garlic.com/~lynn/2006j.html#email810630

in this post
http://www.garlic.com/~lynn/2006j.html#27 virtual memory

compare that with this discussion of millicode:
http://researchweb.watson.ibm.com/journal/rd/483/heller.html

-- 
40+yrs virtualization experience (since Jan68), online at home since Mar70

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