NILL and OILL have a register as the target, and because a register is unique to a processor, there is no need for serialization.
Chris Blaicher Senior Software Engineer, Software Services Syncsort Incorporated 50 Tice Boulevard, Woodcliff Lake, NJ 07677 P: 201-930-8260 | M: 512-627-3803 E: [email protected] -----Original Message----- From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf Of Paul Gilmartin Sent: Thursday, August 02, 2012 9:13 AM To: [email protected] Subject: Re: Why ain't there no XILL? Serialization, performance, auxiliary storage and a related hardware realization: On Aug 2, 2012, at 07:46, Wayne Driscoll wrote: > I would assume the pother is because OIL and NIL are macros that > provide or and and processing with serialization. Your notation fails > to provide serialization. It should be relatively easy to create an > XIL macro based on OIL or NIL however. > I was about to write that, then I RTFM. The P[ro]Ops describes NILL and OILL as quite different from NIL and OIL. A cursory reading does not show whether they are atomic for serialization in a MP environment. > From: John Gilmore <[email protected]> > Date: 08/02/2012 07:12 AM > > Any standard logic text establishes that > > o AND, inclusive OR, and NOT are together universal, > > o NOR alone is universal, and > > o NAND alone is universal. > > Thus, in an obvious notation, > > XOR(a,b) =df (a | b) & (¬(a & b)) > > What is all the pother about? > That such a scheme requires auxiliary storage. That it is slower than a likely hardware implementation. That it may further require locking in a MP environment. Back in the Day of TTL SSI/MSI logic components, I looked at the spec sheets of two chips. The specs included low level circuit diagrams. One vendor called its component MSI and used roughly the formula you give. The other called its component SSI (fewer transistors) and accomplished the function by connecting "a" to the emitter of one transistor and "b" to its base, giving (a & ¬b). "b" was connected to the emitter and "a" to the base of a second transistor, giving (b & ¬a). The collectors were connected in parallel for (a & ¬b) | (b & ¬a), give or take a totem-pole output stage and a liberal seasoning with De Morgan's laws. A very clever and efficient disuse of what any standard logic text establishes. -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN ATTENTION: ----- The information contained in this message (including any files transmitted with this message) may contain proprietary, trade secret or other confidential and/or legally privileged information. Any pricing information contained in this message or in any files transmitted with this message is always confidential and cannot be shared with any third parties without prior written approval from Syncsort. This message is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any use, disclosure, copying or distribution of this message, in any form, is strictly prohibited. If you have received this message in error, please immediately notify the sender and/or Syncsort and destroy all copies of this message in your possession, custody or control. ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
