[email protected] (Ed Gould) writes: > I worked a DC in downtown Chicago in the 70's and 80's and we were > supposedly 24X7 shop. We had power problems+ and we could not afford a > UPS in fact at the time we would have needed a HUGE UPS to get us > through power outages. I guess these were intermittent rather than > lengthy. Our biggest thorn in out side was a solid state paging device > as when it lost power you had to re-init it and re define the PLPA > page data set. Vsam at the time was a PITA as you couldn't delete the > pagespace unless it was already there so we ended up with 5 or 10 page > data sets cataloged on the volume that was empty. (and no noscratch > was ignored most of the time). > Since we only used it for PLPA we had to IPL delete/define PLPA and > update parmlib and then re ipl with CLPA this became a weekly > occurrence until the big boss got tired of the extra outages and got > rid of solid state device (sorry do not remember the vendor).
re: http://www.garlic.com/~lynn/2013c.html#90 Query for Destination z article -- mainframes back to the future recent post about providing online 7x24 service starting in the 60s, some of the hacks that were done to get the "cpu meter" to stop when activity was otherwise idle (back in the days when mainframes were rented and monthly lease was based on "cpu meter" reading): http://www.garlic.com/~lynn/2013c.html#91 What Makes an Architecture Bizarre? recent post about trying to get mutliple exposure support (multiple device addresses per real device ... aka like on 2305 fixed-head disk that came with 8 logical device addresses) for 3350 with fixed-head option ... so I could overlap data transfer from the fixed head area while disk arm was moving for non-fixed head area http://www.garlic.com/~lynn/2013c.html#74 relative mainframe speeds, was What Makes an Architecture Bizarre? I got shotdown by "Jupiter" project in POK ... which was planning on shipping a solid state device ... and thot that I might be competition. They were never able to announce ... since customers started buying all the memory chips that IBM could turn out as processor memory (and memory chips in processors had higher profit than same memory chips in solid state device). Internally they then started providing "IBM 1655" solid state paging devices (initially 2305 simulation) ... 1655s were really from another vendor ... that had developed a way to use memory chips that had failed standard processor memory tests ... in solid state paging devices. Power outages were no problem since had procedure that would come up and automatigically reclaim these devices w/o requiring manual intervention or re-ipl. misc. past posts mentioning the (internal) 1655: http://www.garlic.com/~lynn/2001c.html#17 database (or b-tree) page sizes http://www.garlic.com/~lynn/2001l.html#53 mainframe question http://www.garlic.com/~lynn/2002.html#31 index searching http://www.garlic.com/~lynn/2002i.html#17 AS/400 and MVS - clarification please http://www.garlic.com/~lynn/2002l.html#40 Do any architectures use instruction count instead of timer http://www.garlic.com/~lynn/2003b.html#15 Disk drives as commodities. Was Re: Yamhill http://www.garlic.com/~lynn/2003b.html#17 Disk drives as commodities. Was Re: Yamhill http://www.garlic.com/~lynn/2003c.html#55 HASP assembly: What the heck is an MVT ABEND 422? http://www.garlic.com/~lynn/2003m.html#39 S/360 undocumented instructions? http://www.garlic.com/~lynn/2004d.html#73 DASD Architecture of the future http://www.garlic.com/~lynn/2004e.html#3 Expanded Storage http://www.garlic.com/~lynn/2005e.html#5 He Who Thought He Knew Something About DASD http://www.garlic.com/~lynn/2005r.html#51 winscape? http://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory? http://www.garlic.com/~lynn/2006c.html#1 Multiple address spaces http://www.garlic.com/~lynn/2006e.html#46 using 3390 mod-9s http://www.garlic.com/~lynn/2006k.html#57 virtual memory http://www.garlic.com/~lynn/2006r.html#36 REAL memory column in SDSF http://www.garlic.com/~lynn/2006s.html#30 Why magnetic drums was/are worse than disks ? http://www.garlic.com/~lynn/2007e.html#59 FBA rant http://www.garlic.com/~lynn/2007o.html#26 Tom's Hdw review of SSDs http://www.garlic.com/~lynn/2007s.html#9 Poster of computer hardware events? http://www.garlic.com/~lynn/2007u.html#4 Remembering the CDC 6600 http://www.garlic.com/~lynn/2008b.html#15 Flash memory arrays http://www.garlic.com/~lynn/2009m.html#54 August 7, 1944: today is the 65th Anniversary of the Birth of the Computer http://www.garlic.com/~lynn/2010g.html#11 Mainframe Executive article on the death of tape http://www.garlic.com/~lynn/2010g.html#22 Mainframe Executive article on the death of tape http://www.garlic.com/~lynn/2010g.html#55 Mainframe Executive article on the death of tape http://www.garlic.com/~lynn/2010g.html#82 [OT] What is the protocal for GMT offset in SMTP (e-mail) header time-stamp? http://www.garlic.com/~lynn/2010h.html#78 Software that breaks computer hardware( was:IBM 029 service manual ) http://www.garlic.com/~lynn/2011e.html#75 I'd forgotten what a 2305 looked like http://www.garlic.com/~lynn/2011j.html#9 program coding pads http://www.garlic.com/~lynn/2012n.html#43 history of Programming language and CPU in relation to each -- virtualization experience starting Jan1968, online at home since Mar1970 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
