On Sun, 7 Dec 2025 10:54:37 -0600 Jon Perryman <[email protected]> wrote:
:>On Sun, 7 Dec 2025 09:40:03 +0200, Binyamin Dissen <[email protected]> wrote: :>>:>> Does the cache get flushed if, for example, SAM31 is issued when currently :>>I was referring to the instructions executed ahead of the PSW expecting :>>everything to be the same and disposed of if a branch is unexpectedly :>>taken/not taken. If SAM changes the addressing mode the instructions :>>pre-processed that use addressing must be discarded. :>I believe you are saying, the CPU executes instructions out of sequence and changing addressing mode (SAM) would have an adverse effect if executed out of sequence. While as you say, pre-processed instructions would need to be discarded using a checkpoint, it's far more likely SAM instruction doesn't allow pre-processing of instructions that follow the SAM. Just a guess though. :>Out of curiosity, are you asking because this might have an effect on something you are using or are you just trying to understand pre-processing with regards to SAM? : Making code more structured. To require multiple exit points (that require additional branches) or a common exit point. -- Binyamin Dissen <[email protected]> http://www.dissensoftware.com Director, Dissen Software, Bar & Grill - Israel ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
