On Thu, 11 Feb 2016 05:39:33 -0600, Tom Marchant wrote: > >For example, z/Architecture uses 64-bit addresses, so all of those places >where an >address is defined are 64 bits wide. PSW address is an obvious one. Also, the >locations >for the old and new PSW for SVC, I/O, External, Restart, Machine Check, and >Program >interruptions now require 16 bytes. Dynamic Address Translation tables (page >and >segment tables, etc.) require 64 bits for addresses. Likewise for Control >registers. > Does this imply no more scrunched PSWs? Execution above the bar becomes possible? 64-bit LPA?
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