On Thu, 11 Feb 2016 12:44:54 -0600, Paul Gilmartin wrote: >I had thought (but I can't cite) that LPSW is sensitive to the difference >between >a scrunched and a nonscrunched PSW (flag bit in a CR or in the PSW itself?) >and capable of interpreting either correctly.
LPSW loads a 64-bit PSW. LPSWE loads a 128-bit PSW. This is clearly documented in the Principles of Operation. >>right. 64 bit z/Linux already allows execution above the 2 GiB limit >>imposed by z/OS (and z/VSE, z/VM ??). Also, z/Linux does not have the >>"bar". It has a "line" between < 2GiB (31 bit) and >= 2GiB (64 bit) because >>it never had the "bit 0 is a flag bit" problem. >> >Some of those bits are set/interpreted by the hardware. Linux can't sidestep >them. But it has little effect on problem state programs. The bits in the PSW that specify the addressing mode are indeed applicable to Linux. I think that what John meant is that Linux has no need to support AMODE 24. >Big-endian? Little-endian? I understand that AMODE 64 is indicated by the >low order bit of the address (in the OPSW or returned by LOAD macro?); >AMODE 31 by the high order bit provided that AMODE is not 64. The AMODE of a module is returned to the issuer of LOAD as you described. Bit 63=1 indicates that it is AMODE 64. If not, bit 32 indicates that it is AMODE 31. Both bits equal 0 means that it is AMODE 24. These are the same specifications as used by BASSM and BSM. -- Tom Marchant ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
