On Thu, 11 Feb 2016 10:25:56 -0600, John McKown wrote: >On Thu, Feb 11, 2016 at 10:14 AM, Walt Farrell wrote: > >> Why would it imply that? Those are all z/OS software constructs or >> limitations, not anything to do with the hardware as far as I know. They're >> already possible with today's zArchitecture, if z/OS wanted to >> allow/implement them. >> I had thought (but I can't cite) that LPSW is sensitive to the difference between a scrunched and a nonscrunched PSW (flag bit in a CR or in the PSW itself?) and capable of interpreting either correctly.
>right. 64 bit z/Linux already allows execution above the 2 GiB limit >imposed by z/OS (and z/VSE, z/VM ??). Also, z/Linux does not have the >"bar". It has a "line" between < 2GiB (31 bit) and >= 2GiB (64 bit) because >it never had the "bit 0 is a flag bit" problem. > Some of those bits are set/interpreted by the hardware. Linux can't sidestep them. But it has little effect on problem state programs. Big-endian? Little-endian? I understand that AMODE 64 is indicated by the low order bit of the address (in the OPSW or returned by LOAD macro?); AMODE 31 by the high order bit provided that AMODE is not 64. They're running out of bits. I hope 64 suffices for a long time. Jim Mulder's remarks affirm my perception that software is harder than hardware. -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
