At the risk of topic drift, BTW I believe LGHI Rx,0 is now preferred to XGR 
Rx,Rx. Why?

- On older processors, XGR makes the poor CPU get a stable copy of the register 
and tie up the fixed point arithmetic unit, a long hard way of solving the 
simple problem of "slam a zero into Rx."
- Newer processors recognize XR/SR/SLR Rx,Rx and just treat it as "slam a zero 
into Rx" but it still sets the condition code, which is an unnecessary 
complication for the pipeline logic. Don't mess with the condition code if you 
don't need to.

(Source: 
https://www.ibm.com/developerworks/community/files/form/anonymous/api/library/ff4563be-756e-49bf-9de9-6a04a08026f1/document/3dff8d34-fcf9-4939-9efc-11f15a3ce0f8/media/IBM%20z%20Systems%20Processor%20Optimization%20Primer.pdf)
 

It's a brave new processor world out there. Many things you learned in 1996 are 
no longer true.

Charles

-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf 
Of Tony Harminc
Sent: Thursday, August 25, 2016 2:16 PM
To: [email protected]
Subject: Re: Dump in 64 bit mode "Storage around GPR2 is invalid."

On 25 August 2016 at 12:11, Janet Graff
<[email protected]> wrote:

> I have XGR'd GPR2 and GPR3 before the abend and GPR5 definitely does not 
> contain a bunch Beees.

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