On Tue, Apr 5, 2011 at 2:26 AM, Keith Packard <[email protected]> wrote: > On Mon, 04 Apr 2011 16:29:55 +0100, Chris Wilson <[email protected]> > wrote: > >> Yes. I'm saying that that the controller accepts a write to port 0xa0. > > So it's the GMBUS controller itself then, I guess. Weird. > > Let me see if I understand how it used to work and why fixing the GMBUS > reset causes it to break in this case. >
I could be missing something here, but aren't i2c addresses 8-bit in this case? 7-bit addr + direction bit, which means 0xa0 isn't valid i2c address, since in Linux the read/write bits are specified separately. I could be wrong though. Dave. _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
