Create another lookup table and #defines again to clarify ring signalling. Cut out previous black (yet clever) magic.
Cc: Daniel Vetter <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> --- drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ drivers/gpu/drm/i915/intel_ringbuffer.c | 9 ++++----- drivers/gpu/drm/i915/intel_ringbuffer.h | 19 +------------------ 3 files changed, 11 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index fd087b6..dfee8f2 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -310,6 +310,12 @@ #define RING_START(base) ((base)+0x38) #define RING_CTL(base) ((base)+0x3c) #define RING_SYNC(base, idx) ((base)+0x40 + 4*(idx)) +#define GEN6_RVSYNC (RING_SYNC(RENDER_RING_BASE, 0)) +#define GEN6_RBSYNC (RING_SYNC(RENDER_RING_BASE, 1)) +#define GEN6_VRSYNC (RING_SYNC(GEN6_BSD_RING_BASE, 1)) +#define GEN6_VBSYNC (RING_SYNC(GEN6_BSD_RING_BASE, 0)) +#define GEN6_BRSYNC (RING_SYNC(BLT_RING_BASE, 0)) +#define GEN6_BVSYNC (RING_SYNC(BLT_RING_BASE, 1)) #define RING_MAX_IDLE(base) ((base)+0x54) #define RING_HWS_PGA(base) ((base)+0x80) #define RING_HWS_PGA_GEN6(base) ((base)+0x2080) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 2aac49e..cbf255e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -317,13 +317,9 @@ static void render_ring_cleanup(struct intel_ring_buffer *ring) static void update_semaphore(struct intel_ring_buffer *ring, int i, u32 seqno) { - struct drm_device *dev = ring->dev; - struct drm_i915_private *dev_priv = dev->dev_private; - struct intel_ring_buffer *other; u32 reg; - other = &dev_priv->ring[intel_sync_index_to_ring_id(ring, i)]; - reg = RING_SYNC(other->mmio_base, i); + reg = ring->signal_mbox[i]; intel_ring_emit(ring, MI_SEMAPHORE_MBOX | @@ -1024,6 +1020,7 @@ static const struct intel_ring_buffer render_ring = { .semaphore_register = {MI_SEMAPHORE_SYNC_INVALID, MI_SEMAPHORE_SYNC_RV, MI_SEMAPHORE_SYNC_RB}, + .signal_mbox = {GEN6_VRSYNC, GEN6_BRSYNC}, }; @@ -1155,6 +1152,7 @@ static const struct intel_ring_buffer gen6_bsd_ring = { .semaphore_register = {MI_SEMAPHORE_SYNC_VR, MI_SEMAPHORE_SYNC_INVALID, MI_SEMAPHORE_SYNC_VB}, + .signal_mbox = {GEN6_RVSYNC, GEN6_BVSYNC}, }; /* Blitter support (SandyBridge+) */ @@ -1289,6 +1287,7 @@ static const struct intel_ring_buffer gen6_blt_ring = { .semaphore_register = {MI_SEMAPHORE_SYNC_BR, MI_SEMAPHORE_SYNC_BV, MI_SEMAPHORE_SYNC_INVALID}, + .signal_mbox = {GEN6_RBSYNC, GEN6_VBSYNC}, }; int intel_init_render_ring_buffer(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 13167c6..61790c8 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -73,6 +73,7 @@ struct intel_ring_buffer { void (*cleanup)(struct intel_ring_buffer *ring); u32 semaphore_register[3]; /*our mbox written by others */ + u32 signal_mbox[2]; /* mboxes this ring signals to */ /** * List of objects currently involved in rendering from the @@ -137,24 +138,6 @@ intel_ring_sync_index(struct intel_ring_buffer *ring, return idx; } -static inline int -intel_sync_index_to_ring_id(struct intel_ring_buffer *ring, - int other) -{ - int id; - - /* - * cs -> 1 = vcs, 0 = bcs - * vcs -> 1 = bcs, 0 = cs, - * bcs -> 1 = cs, 0 = vcs. - */ - id = ring->id; - id += 2 - other; - id %= 3; - - return id; -} - static inline u32 intel_read_status_page(struct intel_ring_buffer *ring, int reg) -- 1.7.6.1 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
