On Wed, Mar 21, 2012 at 12:48:33PM -0700, Jesse Barnes wrote: > We need to flush the Gunit TLB when we update GTT PTEs on VLV, but the > register for doing so is above the range we normally map. Map the whole > register space to make sure we can get it. > > Signed-off-by: Jesse Barnes <[email protected]> > --- > drivers/char/agp/intel-gtt.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c > index 5cf47ac..19b6486 100644 > --- a/drivers/char/agp/intel-gtt.c > +++ b/drivers/char/agp/intel-gtt.c > @@ -1211,7 +1211,7 @@ static int i9xx_setup(void) > > reg_addr &= 0xfff80000; > > - intel_private.registers = ioremap(reg_addr, 128 * 4096); > + intel_private.registers = ioremap(reg_addr, MB(2));
If I'm reading my lspci output correctly, my i915g only has 1mb, not to. -Daniel > if (!intel_private.registers) > return -ENOMEM; > > -- > 1.7.5.4 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: [email protected] Mobile: +41 (0)79 365 57 48 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
