If the hardware dies without outstanding GPU fenced access, we no longer
care and can simply reuse the fence.

Signed-off-by: Chris Wilson <[email protected]>
---
 drivers/gpu/drm/i915/i915_gem.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 16591ad..ffe0853 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2347,7 +2347,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object 
*obj,
                if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) {
                        ret = i915_gem_flush_ring(obj->last_fenced_ring,
                                                  0, obj->base.write_domain);
-                       if (ret)
+                       if (ret && ret != -EIO)
                                return ret;
                }
 
@@ -2360,7 +2360,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object 
*obj,
                        ret = i915_wait_request(obj->last_fenced_ring,
                                                obj->last_fenced_seqno,
                                                true);
-                       if (ret)
+                       if (ret && ret != -EIO)
                                return ret;
                }
 
-- 
1.7.10

_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to