If the CSB head/tail pointers are unchanged, we can skip the update of
the CSB register afterwards.

Signed-off-by: Chris Wilson <[email protected]>
Reviewed-by: Joonas Lahtinen <[email protected]>
---
 drivers/gpu/drm/i915/intel_lrc.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 7db9c49450f9..a46a05f0e79c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -574,9 +574,12 @@ static void intel_lrc_irq_handler(unsigned long data)
                csb = readl(csb_mmio);
                head = GEN8_CSB_READ_PTR(csb);
                tail = GEN8_CSB_WRITE_PTR(csb);
+               if (head == tail)
+                       break;
+
                if (tail < head)
                        tail += GEN8_CSB_ENTRIES;
-               while (head < tail) {
+               do {
                        unsigned int idx = ++head % GEN8_CSB_ENTRIES;
                        unsigned int status = readl(buf + 2 * idx);
 
@@ -601,7 +604,7 @@ static void intel_lrc_irq_handler(unsigned long data)
 
                        GEM_BUG_ON(port[0].count == 0 &&
                                   !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
-               }
+               } while (head < tail);
 
                writel(_MASKED_FIELD(GEN8_CSB_READ_PTR_MASK,
                                     GEN8_CSB_WRITE_PTR(csb) << 8),
-- 
2.11.0

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