From: Mahesh Kumar <mahesh1.ku...@intel.com>
This patch initializes MBus during display initialization.
Changes since V2 (from Paulo):
- Don't forget to remove the WARN_ON(1) call.
Changes since V1:
- Rebase to use function like Macros
Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Reviewed-by: James Ausmus <james.aus...@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.ku...@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 7e8694a70661..16790f2576ec 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2676,6 +2676,18 @@ static void icl_dbuf_disable(struct drm_i915_private
*dev_priv)
DRM_ERROR("DBuf power disable timeout!\n");
}
+static void icl_mbus_init(struct drm_i915_private *dev_priv)
+{
+ uint32_t val;
+
+ val = MBUS_ABOX_BT_CREDIT_POOL1(16) |
+ MBUS_ABOX_BT_CREDIT_POOL2(16) |
+ MBUS_ABOX_B_CREDIT(1) |
+ MBUS_ABOX_BW_CREDIT(1);
+
+ I915_WRITE(MBUS_ABOX_CTL, val);
+}
+
static void skl_display_core_init(struct drm_i915_private *dev_priv,
bool resume)
{
@@ -2990,7 +3002,7 @@ static void icl_display_core_init(struct drm_i915_private
*dev_priv,
icl_dbuf_enable(dev_priv);
/* 7. Setup MBUS. */
- /* FIXME: MBUS code not here yet. */
+ icl_mbus_init(dev_priv);
/* 8. CHICKEN_DCPR_1 */
I915_WRITE(GEN8_CHICKEN_DCPR_1, I915_READ(GEN8_CHICKEN_DCPR_1) |
--
2.14.3
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