From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
---
drivers/gpu/drm/i915/Kconfig.platforms | 12 ++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 4 +++-
drivers/gpu/drm/i915/i915_pci.c | 6 ++++++
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index ade0520a1559..1302eb3989be 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -129,3 +129,15 @@ config DRM_I915_PLATFORM_INTEL_IRONLAKE
select DRM_I915_GEN5
help
Include support for Intel Ironlake platforms.
+
+config DRM_I915_GEN6
+ bool
+
+config DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
+ bool "Intel Sandybridge platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN6
+ help
+ Include support for Intel Sandybridge platforms.
+
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3c8970a83f51..311ddb8009b4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2729,7 +2729,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN5(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN5) && \
((dev_priv)->info.gen_mask & BIT(4)))
-#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5)))
+#define IS_GEN6(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN6) && \
+ ((dev_priv)->info.gen_mask & BIT(5)))
#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
#define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index dbc580f05678..8a7399787f4b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -273,6 +273,7 @@ static const struct intel_device_info intel_ironlake_m_info
= {
GEN6_FEATURES, \
.platform = INTEL_SANDYBRIDGE
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
static const struct intel_device_info intel_sandybridge_d_gt1_info = {
SNB_D_PLATFORM,
.gt = 1,
@@ -282,6 +283,7 @@ static const struct intel_device_info
intel_sandybridge_d_gt2_info = {
SNB_D_PLATFORM,
.gt = 2,
};
+#endif
#define SNB_M_PLATFORM \
GEN6_FEATURES, \
@@ -289,6 +291,7 @@ static const struct intel_device_info
intel_sandybridge_d_gt2_info = {
.is_mobile = 1
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
static const struct intel_device_info intel_sandybridge_m_gt1_info = {
SNB_M_PLATFORM,
.gt = 1,
@@ -298,6 +301,7 @@ static const struct intel_device_info
intel_sandybridge_m_gt2_info = {
SNB_M_PLATFORM,
.gt = 2,
};
+#endif
#define GEN7_FEATURES \
.gen = 7, .num_pipes = 3, \
@@ -675,10 +679,12 @@ static const struct pci_device_id pciidlist[] = {
INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
INTEL_SNB_D_GT2_IDS(&intel_sandybridge_d_gt2_info),
INTEL_SNB_M_GT1_IDS(&intel_sandybridge_m_gt1_info),
INTEL_SNB_M_GT2_IDS(&intel_sandybridge_m_gt2_info),
+#endif
INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */
INTEL_IVB_M_GT1_IDS(&intel_ivybridge_m_gt1_info),
INTEL_IVB_M_GT2_IDS(&intel_ivybridge_m_gt2_info),
--
2.14.1
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