From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
---
drivers/gpu/drm/i915/Kconfig.platforms | 11 +++++++++++
drivers/gpu/drm/i915/i915_drv.h | 7 +++++--
drivers/gpu/drm/i915/i915_pci.c | 4 ++++
3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index 559d563e8f2e..ade0520a1559 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -118,3 +118,14 @@ config DRM_I915_PLATFORM_INTEL_GM45
select DRM_I915_GEN4
help
Include support for Intel GM45 platform.
+
+config DRM_I915_GEN5
+ bool
+
+config DRM_I915_PLATFORM_INTEL_IRONLAKE
+ bool "Intel Ironlake platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN5
+ help
+ Include support for Intel Ironlake platforms.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 37b62f8833ba..3c8970a83f51 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2597,7 +2597,8 @@ intel_info(const struct drm_i915_private *dev_priv)
(INTEL_DEVID(dev_priv) == 0xa011))
#define IS_PINEVIEW(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_PINEVIEW)
#define IS_G33(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE_M(dev_priv) (IS_OPT_PLATFORM(dev_priv,
INTEL_IRONLAKE) && \
+ (INTEL_DEVID(dev_priv) == 0x0046))
#define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
@@ -2725,7 +2726,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN4(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN4) && \
((dev_priv)->info.gen_mask & BIT(3)))
-#define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4)))
+#define IS_GEN5(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN5) && \
+ ((dev_priv)->info.gen_mask & BIT(4)))
#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5)))
#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 20043a75b40f..dbc580f05678 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -243,6 +243,7 @@ static const struct intel_device_info intel_gm45_info = {
GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_IRONLAKE
static const struct intel_device_info intel_ironlake_d_info = {
GEN5_FEATURES,
.platform = INTEL_IRONLAKE,
@@ -253,6 +254,7 @@ static const struct intel_device_info intel_ironlake_m_info
= {
.platform = INTEL_IRONLAKE,
.is_mobile = 1, .has_fbc = 1,
};
+#endif
#define GEN6_FEATURES \
.gen = 6, .num_pipes = 2, \
@@ -669,8 +671,10 @@ static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_G45
INTEL_G45_IDS(&intel_g45_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_IRONLAKE
INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
+#endif
INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
INTEL_SNB_D_GT2_IDS(&intel_sandybridge_d_gt2_info),
INTEL_SNB_M_GT1_IDS(&intel_sandybridge_m_gt1_info),
--
2.14.1
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