== Series Details == Series: Display Stream Compression enabling on eDP/DP (rev4) URL : https://patchwork.freedesktop.org/series/47514/ State : warning
== Summary == $ dim checkpatch origin/drm-tip c28404862aa9 drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming f1feaec457cc drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT 23db8f3fa417 drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init 3d7e87c20a5e drm/dp: DRM DP helper/macros to get DP sink DSC parameters b05fa7e9e1c0 drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC -:27: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #27: * rename it as SMALL_JOINER since we are not enabling big joiner yet (Anusha) total: 0 errors, 1 warnings, 0 checks, 132 lines checked 3229480fcf42 drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported 91e0ef49ef5f drm/dp: Define payload size for DP SDP PPS packet 80275c56167e drm/dsc: Define Display Stream Compression PPS infoframe -:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #27: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 347 lines checked 3f646b2cd07d drm/dsc: Define VESA Display Stream Compression Capabilities -:34: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by: #34: Co-developed-by: Manasi Navare <manasi.d.nav...@intel.com> -:73: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #73: FILE: include/drm/drm_dsc.h:40: + bool convert_rgb; -:83: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #83: FILE: include/drm/drm_dsc.h:50: + bool enable422; -:108: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #108: FILE: include/drm/drm_dsc.h:75: + bool block_pred_enable; -:136: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #136: FILE: include/drm/drm_dsc.h:103: + bool vbr_enable; -:151: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #151: FILE: include/drm/drm_dsc.h:118: + bool native_422; -:153: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #153: FILE: include/drm/drm_dsc.h:120: + bool native_420; total: 0 errors, 1 warnings, 6 checks, 121 lines checked 2fa50580e540 drm/dsc: Define Rate Control values that do not change over configurations -:42: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.sriva...@intel.com>' total: 0 errors, 1 warnings, 0 checks, 12 lines checked b37f405578b5 drm/dsc: Add helpers for DSC picture parameter set infoframes -:23: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #23: * Add reference to added kernel-docs in Documentation/gpu/drm-kms-helpers.rst -:74: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #74: new file mode 100644 total: 0 errors, 2 warnings, 0 checks, 287 lines checked c373898f4090 drm/i915/dp: Add DSC params and DSC config to intel_crtc_state -:46: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #46: FILE: drivers/gpu/drm/i915/intel_drv.h:904: + bool compression_enable; -:47: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #47: FILE: drivers/gpu/drm/i915/intel_drv.h:905: + bool dsc_split; total: 0 errors, 0 warnings, 2 checks, 22 lines checked a269e9cbb0cb drm/i915/dp: Compute DSC pipe config in atomic check 6505ec03ee07 drm/i915/dp: Do not enable PSR2 if DSC is enabled 6071851e78f6 drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants 2dc4510a94cf drm/i915/dsc: Define & Compute VESA DSC params -:65: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by: #65: Co-developed-by: Manasi Navare <manasi.d.nav...@intel.com> -:91: WARNING:MISSING_SPACE: break quoted strings at a space character #91: FILE: drivers/gpu/drm/i915/intel_dp.c:2045: + DRM_ERROR("Cannot compute valid DSC parameters for Input Bpp = %d" + "Compressed BPP = %d\n", -:115: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #115: new file mode 100644 -:401: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #401: FILE: drivers/gpu/drm/i915/intel_vdsc.c:282: +} +}; total: 0 errors, 3 warnings, 1 checks, 496 lines checked 364395179414 drm/i915/dsc: Compute Rate Control parameters for DSC -:134: CHECK:SPACING: space preferred before that '*' (ctx:VxE) #134: FILE: drivers/gpu/drm/i915/intel_vdsc.c:411: + vdsc_cfg->slice_bpg_offset)* ^ -:166: CHECK:LINE_SPACING: Please don't use multiple blank lines #166: FILE: drivers/gpu/drm/i915/intel_vdsc.c:443: + + total: 0 errors, 0 warnings, 2 checks, 138 lines checked 2e8d374ecf60 drm/i915/dp: Enable/Disable DSC in DP Sink 36a228201d7c drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI -:45: ERROR:CODE_INDENT: code indent should use tabs where possible #45: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:1971: + ^I * - eDP/MIPI DSI VDSC$ -:45: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #45: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:1971: + ^I * - eDP/MIPI DSI VDSC$ total: 1 errors, 1 warnings, 0 checks, 37 lines checked f31be5cedd0e drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling -:35: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files #35: FILE: drivers/gpu/drm/i915/i915_drv.h:3472: +extern void intel_dsc_enable(struct intel_encoder *encoder, -:323: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #323: FILE: drivers/gpu/drm/i915/intel_vdsc.c:841: + rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] << ^ -:326: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #326: FILE: drivers/gpu/drm/i915/intel_vdsc.c:844: + rc_buf_thresh_dword[i/4]); ^ -:367: WARNING:LONG_LINE: line over 100 characters #367: FILE: drivers/gpu/drm/i915/intel_vdsc.c:885: + rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << -:367: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #367: FILE: drivers/gpu/drm/i915/intel_vdsc.c:885: + rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << ^ -:374: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #374: FILE: drivers/gpu/drm/i915/intel_vdsc.c:892: + rc_range_params_dword[i/2]); ^ -:488: WARNING:RETURN_VOID: void function return statements are not generally useful #488: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1006: + return; +} total: 0 errors, 2 warnings, 5 checks, 447 lines checked d81afaa3f3af drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs ebfeb6c84440 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes 667d667fcc32 drm/i915/icl: Add Display Stream Splitter control registers -:68: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.sriva...@intel.com>' total: 0 errors, 1 warnings, 0 checks, 39 lines checked 7adbcfab9358 drm/i915/dp: Configure Display stream splitter registers during DSC enable d52012c3f51f drm/i915/dp: Disable DSC in source by disabling DSS CTL bits -:33: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files #33: FILE: drivers/gpu/drm/i915/i915_drv.h:3474: +extern void intel_dsc_disable(struct intel_encoder *encoder, total: 0 errors, 0 warnings, 1 checks, 73 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
