On Mon, Feb 04, 2019 at 10:22:32PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <[email protected]>
> 
> Disabling WM1+ on ICL causes tons of underruns with
> linear/X-tiled framebuffers. We can avoid this by flipping
> on a chicken bit affecting the way the hw fill the FIFO.
> This may not be the final solution but should hopefully
> avoid some underruns in the meantime.
> 
> v2: Apparently PIPE_CHICKEN is icl+ only
> 
> Signed-off-by: Ville Syrjälä <[email protected]>

I can't speak for what this register actually does, but your patch
accurately implements the recommendation from the hardware guys, so

Reviewed-by: Matt Roper <[email protected]>


> ---
>  drivers/gpu/drm/i915/i915_reg.h      | 1 +
>  drivers/gpu/drm/i915/intel_display.c | 6 ++++++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ede54fdc1676..12964b0fbc54 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7618,6 +7618,7 @@ enum {
>  #define _PIPEB_CHICKEN                       0x71038
>  #define _PIPEC_CHICKEN                       0x72038
>  #define  PER_PIXEL_ALPHA_BYPASS_EN   (1 << 7)
> +#define  PM_FILL_MAINTAIN_DBUF_FULLNESS      (1 << 0)
>  #define PIPE_CHICKEN(pipe)           _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
>                                                  _PIPEB_CHICKEN)
>  
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 5b9b9791d290..b825ceed7f1d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3911,6 +3911,12 @@ static void icl_set_pipe_chicken(struct intel_crtc 
> *crtc)
>        */
>       tmp |= PER_PIXEL_ALPHA_BYPASS_EN;
>  
> +     /*
> +      * W/A for underruns with linear/X-tiled with
> +      * WM1+ disabled.
> +      */
> +     tmp |= PM_FILL_MAINTAIN_DBUF_FULLNESS;
> +
>       I915_WRITE(PIPE_CHICKEN(pipe), tmp);
>  }
>  
> -- 
> 2.19.2
> 
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-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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