Op 05-02-2019 om 14:39 schreef Ville Syrjälä: > On Tue, Feb 05, 2019 at 12:21:19PM +0100, Maarten Lankhorst wrote: >> Op 04-02-2019 om 21:22 schreef Ville Syrjala: >>> From: Ville Syrjälä <[email protected]> >>> >>> Configure PIPE_CHICKEN during intel_update_pipe_config() to make >>> sure we have our chickens in a row with fastboot too. >>> >>> v2: Apparently PIPE_CHICKEN is icl+ only >>> >>> Signed-off-by: Ville Syrjälä <[email protected]> >>> --- >>> drivers/gpu/drm/i915/intel_display.c | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/i915/intel_display.c >>> b/drivers/gpu/drm/i915/intel_display.c >>> index 4087d54ea943..5b9b9791d290 100644 >>> --- a/drivers/gpu/drm/i915/intel_display.c >>> +++ b/drivers/gpu/drm/i915/intel_display.c >>> @@ -3958,6 +3958,9 @@ static void intel_update_pipe_config(const struct >>> intel_crtc_state *old_crtc_sta >>> I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe), >>> SKL_BOTTOM_COLOR_GAMMA_ENABLE | >>> SKL_BOTTOM_COLOR_CSC_ENABLE); >>> + >>> + if (INTEL_GEN(dev_priv) >= 11) >>> + icl_set_pipe_chicken(crtc); >>> } >>> >>> static void intel_fdi_normal_train(struct intel_crtc *crtc) >> Could we set it on the initial watermark sanitization pass somehow? In case >> userspace doesn't bother setting a mode? >> >> During atomic check we test for distrust_bios_wm, but unfortunately it's >> cleared before the state is committed to hw. >> >> Hmm there's intel_initial_commit, but that wouldn't work for the s4 resume >> path.. > I think we should just force update_pipe=true for the first commit after > readout. That should fix up everything (tm). > Hmm, resume should already do that by downgrading the modeset if possible.
We could perhaps do it from intel_initial_commit() ? ~Maarten _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
