Couple up the context in/out accounting to record how long each engine
is busy handling requests. This is exposed to userspace for more accurate
measurements, and also enables our soft-rps timer.

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_ring_scheduler.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_ring_scheduler.c 
b/drivers/gpu/drm/i915/gt/intel_ring_scheduler.c
index 338d847445ca..b95f4ad4bd00 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_scheduler.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_scheduler.c
@@ -11,6 +11,7 @@
 #include "intel_breadcrumbs.h"
 #include "intel_context.h"
 #include "intel_engine_pm.h"
+#include "intel_engine_stats.h"
 #include "intel_gt.h"
 #include "intel_gt_pm.h"
 #include "intel_gt_requests.h"
@@ -63,6 +64,8 @@ static struct intel_engine_cs *__schedule_in(struct 
i915_request *rq)
        if (engine->fw_domain && !engine->fw_active++)
                intel_uncore_forcewake_get(engine->uncore, engine->fw_domain);
 
+       intel_engine_context_in(engine);
+
        CE_TRACE(ce, "schedule-in\n");
 
        return engine;
@@ -96,6 +99,8 @@ static void __schedule_out(struct i915_request *rq)
        else
                i915_request_update_deadline(list_next_entry(rq, link));
 
+       intel_engine_context_out(engine);
+
        if (engine->fw_domain && !--engine->fw_active)
                intel_uncore_forcewake_put(engine->uncore, engine->fw_domain);
        intel_gt_pm_put_async(engine->gt);
@@ -755,6 +760,7 @@ int intel_ring_scheduler_setup(struct intel_engine_cs 
*engine)
 
        engine->flags |= I915_ENGINE_HAS_SCHEDULER;
        engine->flags |= I915_ENGINE_NEEDS_BREADCRUMB_TASKLET;
+       engine->flags |= I915_ENGINE_SUPPORTS_STATS;
 
        /* Finally, take ownership and responsibility for cleanup! */
        engine->release = ring_release;
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to