> -----Original Message-----
> From: Intel-xe <intel-xe-boun...@lists.freedesktop.org> On Behalf Of Imre Deak
> Sent: Tuesday, 5 August 2025 10.37
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: [PATCH 14/19] drm/i915/tc: Unify the way to get the max lane count
> value on MTL+
>
> Unify the way to get the max lane count value on all MTL+ platforms, reducing
> the code duplication.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 24 ------------------------
> 1 file changed, 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 5b044ece815df..77c5a37450a26 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -322,27 +322,6 @@ get_pin_assignment(struct intel_tc_port *tc)
> return pin_assignment;
> }
>
> -static int lnl_tc_port_get_max_lane_count(struct intel_digital_port
> *dig_port) -{
> - struct intel_tc_port *tc = to_tc_port(dig_port);
> - enum intel_tc_pin_assignment pin_assignment;
> -
> - pin_assignment = get_pin_assignment(tc);
> -
> - switch (pin_assignment) {
> - case INTEL_TC_PIN_ASSIGNMENT_NONE:
> - return 0;
> - default:
> - MISSING_CASE(pin_assignment);
> - fallthrough;
> - case INTEL_TC_PIN_ASSIGNMENT_D:
> - return 2;
> - case INTEL_TC_PIN_ASSIGNMENT_C:
> - case INTEL_TC_PIN_ASSIGNMENT_E:
> - return 4;
> - }
> -}
> -
> static int mtl_tc_port_get_max_lane_count(struct intel_digital_port
> *dig_port) {
> struct intel_tc_port *tc = to_tc_port(dig_port); @@ -395,9 +374,6 @@
> static int get_max_lane_count(struct intel_tc_port
> *tc)
> if (tc->mode != TC_PORT_DP_ALT)
> return 4;
>
> - if (DISPLAY_VER(display) >= 20)
> - return lnl_tc_port_get_max_lane_count(dig_port);
> -
> if (DISPLAY_VER(display) >= 14)
> return mtl_tc_port_get_max_lane_count(dig_port);
>
> --
> 2.49.1
