For consistency, handle pin assignment NONE on all platforms similarly to LNL+. On earlier platforms the driver doesn't actually see this pin assignment - as it's not valid on a connected DP-alt PHY - however it's a valid HW setting even on those platforms, for instance in legacy mode. Handle this pin assignment on earlier platforms as well, so that the way to query the pin assignment can be unified by a follow-up change.
Signed-off-by: Imre Deak <imre.d...@intel.com> --- drivers/gpu/drm/i915/display/intel_tc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 05df252640f46..dcadbf7b3d40d 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -334,6 +334,8 @@ static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port) pin_assignment = intel_tc_port_get_pin_assignment(dig_port); switch (pin_assignment) { + case INTEL_TC_PIN_ASSIGNMENT_NONE: + return 0; default: MISSING_CASE(pin_assignment); fallthrough; -- 2.49.1