On Mon, 03 Nov 2025, Mitul Golani <[email protected]> wrote:
> Increment DC Balance Flip count before every send push to indicate
> DMC firmware about new flip occurrence. This is tracked separately
> from legacy FLIP_COUNT register.
>
> Signed-off-by: Mitul Golani <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_color.c   |  1 +
>  drivers/gpu/drm/i915/display/intel_display.c |  1 +
>  drivers/gpu/drm/i915/display/intel_vrr.c     | 15 +++++++++++++++
>  drivers/gpu/drm/i915/display/intel_vrr.h     |  3 +++
>  4 files changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 1e97020e7304..47a732ae2448 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -2012,6 +2012,7 @@ void intel_color_prepare_commit(struct 
> intel_atomic_state *state,
>       display->funcs.color->load_luts(crtc_state);
>  
>       if (crtc_state->use_dsb && intel_color_uses_chained_dsb(crtc_state)) {
> +             intel_vrr_dcb_increment_flip_count(crtc_state, crtc);
>               intel_vrr_send_push(crtc_state->dsb_color, crtc_state);
>               intel_dsb_wait_for_delayed_vblank(state, crtc_state->dsb_color);
>               intel_vrr_check_push_sent(crtc_state->dsb_color, crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a00625f882e8..1a3e7a6e4ab7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7366,6 +7366,7 @@ static void intel_atomic_dsb_finish(struct 
> intel_atomic_state *state,
>       if (new_crtc_state->use_dsb && 
> !intel_color_uses_chained_dsb(new_crtc_state)) {
>               intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
>  
> +             intel_vrr_dcb_increment_flip_count(new_crtc_state, crtc);
>               intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
>               intel_dsb_wait_for_delayed_vblank(state, 
> new_crtc_state->dsb_commit);
>               intel_vrr_check_push_sent(new_crtc_state->dsb_commit,
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c 
> b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 2948abc90c69..87bd722aa32d 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -14,6 +14,7 @@
>  #include "intel_psr.h"
>  #include "intel_vrr.h"
>  #include "intel_vrr_regs.h"
> +#include "intel_dmc_regs.h"

Please keep includes sorted.

>  #include "skl_prefill.h"
>  #include "skl_watermark.h"
>  
> @@ -612,6 +613,20 @@ void intel_vrr_set_transcoder_timings(const struct 
> intel_crtc_state *crtc_state)
>                              EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start));
>  }
>  
> +void
> +intel_vrr_dcb_increment_flip_count(struct intel_crtc_state *crtc_state,
> +                                struct intel_crtc *crtc)
> +{
> +     struct intel_display *display = to_intel_display(crtc_state);
> +     enum pipe pipe = crtc->pipe;
> +
> +     if (!crtc_state->vrr.dc_balance.enable)
> +             return;
> +
> +     intel_de_write(display, PIPEDMC_DCB_FLIP_COUNT(pipe),
> +                    ++crtc->dc_balance.flip_count);
> +}
> +
>  void intel_vrr_send_push(struct intel_dsb *dsb,
>                        const struct intel_crtc_state *crtc_state)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h 
> b/drivers/gpu/drm/i915/display/intel_vrr.h
> index 66fb9ad846f2..eebc7be309db 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -14,6 +14,7 @@ struct intel_connector;
>  struct intel_crtc_state;
>  struct intel_dsb;
>  struct intel_display;
> +struct intel_crtc;

Please keep forward declarations sorted.

>  
>  bool intel_vrr_is_capable(struct intel_connector *connector);
>  bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh);
> @@ -39,6 +40,8 @@ bool intel_vrr_is_fixed_rr(const struct intel_crtc_state 
> *crtc_state);
>  void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state 
> *crtc_state);
> +void intel_vrr_dcb_increment_flip_count(struct intel_crtc_state *crtc_state,
> +                                     struct intel_crtc *crtc);
>  bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
>  int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state);
>  int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state 
> *crtc_state);

-- 
Jani Nikula, Intel

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