Fix the issues in v1 after further testing, review and issues existing
in the current code revealed by the self-tests added by the patchset
and as such gives a background/rationale for adding all the self-test
infra in the patchset (see last 3 items below).

* Fix determining the encoder mode from the crtc_state vs.
   the intel_encoder_is_dp/hdmi() helpers
* Fix termination of PLL parameter list in the PLL tables
* Move changes in the patchset to the patch they logically belong
* Use a stricter +-1kHz allowance for a difference between the
   computed and requested PLL clock rate
* Drop fixed non-FRL HDMI PLL parameter entries, due to a mismatch
   between the fixed PLL dividers and clock rate for these
* Fix 10x-off FRL HDMI clock rates
* Fix DP2.0 10G and 20G and HDMI FRL clock rate determination
   during PLL enabling

https://lore.kernel.org/intel-gfx/[email protected]/

Cc: Imre Deak <[email protected]>

Mika Kahola (15):
  drm/i915/c10: Move C10 port clock calculation
  drm/i915/c20: Move C20 port clock calculation
  drm/i915/cx0: Drop Cx0 crtc_state from HDMI TMDS pll divider
    calculation
  drm/i915/lt_phy: Drop LT PHY crtc_state for port calculation
  drm/i915/cx0: Drop encoder from port clock calculation
  drm/i915/cx0: Create macro around pll tables
  drm/i915/lt_phy: Create macro for lt phy pll state
  drm/i915/display: Add helper function for fuzzy clock check
  drm/i915/cx0: Fix HDMI FRL clock rates
  drm/i915/cx0: Add a fuzzy check for DP/HDMI clock rates during
    programming
  drm/i915/cx0: Verify C10/C20 pll dividers
  drm/i915/lt_phy: Add verification for lt phy pll dividers
  drm/i915/cx0: Drop C20 25.175 MHz rate
  drm/i915/lt_phy: Drop 27.2 MHz rate
  drm/i915/display: Remove .clock member from eDP/DP/HDMI pll tables

 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 731 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_cx0_phy.h  |   2 +
 drivers/gpu/drm/i915/display/intel_ddi.c      |   4 +-
 drivers/gpu/drm/i915/display/intel_dpll.c     |   3 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  11 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |   3 -
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  18 +-
 drivers/gpu/drm/i915/display/intel_lt_phy.c   | 242 +++---
 drivers/gpu/drm/i915/display/intel_lt_phy.h   |   5 +-
 .../drm/i915/display/intel_snps_hdmi_pll.c    |   2 -
 10 files changed, 549 insertions(+), 472 deletions(-)

-- 
2.34.1

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