> Subject: [PATCH v2 04/10] drm/i915/cmtg: program vrr registers of cmtg

* CMTG
* VRR

> 
> Enable vrr if it is enabled on cmtg registers.

*VRR
* CMTG

> 
> v2: Use sw state instead of reading from hardware. [Jani]
> 
> Signed-off-by: Animesh Manna <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_cmtg.c          | 12 ++++++++++++
>  drivers/gpu/drm/i915/display/intel_cmtg_regs.h     |  5 +++++
>  drivers/gpu/drm/i915/display/intel_display_types.h |  1 +
>  drivers/gpu/drm/i915/display/intel_vrr.c           |  4 ++++
>  4 files changed, 22 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c
> b/drivers/gpu/drm/i915/display/intel_cmtg.c
> index 4220eeece07f..26adf70cdd00 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> @@ -17,6 +17,7 @@
>  #include "intel_display_power.h"
>  #include "intel_display_regs.h"
>  #include "intel_display_types.h"
> +#include "intel_vrr.h"
> 
>  /**
>   * DOC: Common Primary Timing Generator (CMTG) @@ -220,6 +221,17 @@
> static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
>       intel_de_write(display, TRANS_VTOTAL_CMTG(cpu_transcoder), crtc-
> >cmtg.vtotal);
>       intel_de_write(display, TRANS_VBLANK_CMTG(cpu_transcoder), crtc-
> >cmtg.vblank);
>       intel_de_write(display, TRANS_VSYNC_CMTG(cpu_transcoder), crtc-
> >cmtg.vsync);
> +
> +     if (intel_vrr_possible(crtc_state) &&
> intel_vrr_always_use_vrr_tg(display)) {
> +             intel_de_write(display,
> TRANS_VRR_VMIN_CMTG(cpu_transcoder),
> +                            crtc_state->vrr.vmin - 1);
> +             intel_de_write(display,
> TRANS_VRR_VMAX_CMTG(cpu_transcoder),
> +                            crtc_state->vrr.vmax - 1);
> +             intel_de_write(display,
> TRANS_VRR_FLIPLINE_CMTG(cpu_transcoder),
> +                            crtc_state->vrr.flipline - 1);

IMHO These three need to be called from 
intel_vrr_set_fixed_rr_timings() 
you can wrap this up in a function of its own called 
intel_cmtg_set_fixed_rr_timings()


> +             intel_de_write(display,
> TRANS_VRR_CTL_CMTG(cpu_transcoder),
> +                            crtc->cmtg.vrr_ctl);

This needs to directly be called from intel_vrr_tg_enable
Which also saves you from having you save the variable in intel_crtc
Which shouldn't be there in the first place (maybe in crtc_state if needed but 
I don't see the real need of having it at all.

Regards,
Suraj Kandpal

> +     }
>  }
> 
>  void intel_cmtg_enable(const struct intel_crtc_state *crtc_state) diff --git
> a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> index eb24827d22f5..eab90415d0da 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> @@ -27,4 +27,9 @@
>  #define TRANS_VBLANK_CMTG(id)                _MMIO(0x6F010 + (id) *
> 0x100)
>  #define TRANS_VSYNC_CMTG(id)         _MMIO(0x6F014 + (id) *
> 0x100)
> 
> +#define TRANS_VRR_CTL_CMTG(id)               _MMIO(0x6F420 + (id) *
> 0x100)
> +#define TRANS_VRR_VMAX_CMTG(id)              _MMIO(0x6F424 + (id) *
> 0x100)
> +#define TRANS_VRR_VMIN_CMTG(id)              _MMIO(0x6F434 + (id) *
> 0x100)
> +#define TRANS_VRR_FLIPLINE_CMTG(id)  _MMIO(0x6F438 + (id) *
> 0x100)
> +
>  #endif /* __INTEL_CMTG_REGS_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index defb54dd0bbe..a87f3ec10aea 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1574,6 +1574,7 @@ struct intel_crtc {
>               bool enable;
>               u32 htotal, hblank, hsync;
>               u32 vtotal, vblank, vsync;
> +             u32 vrr_ctl;
>       } cmtg;
>  };
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
> b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 9d814cc2d608..2c1ae685400f 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -892,6 +892,7 @@ static void intel_vrr_tg_enable(const struct
> intel_crtc_state *crtc_state,  {
>       struct intel_display *display = to_intel_display(crtc_state);
>       enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +     struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>       u32 vrr_ctl;
> 
>       intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), @@ -
> 907,6 +908,9 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state
> *crtc_state,
>       if (cmrr_enable)
>               vrr_ctl |= VRR_CTL_CMRR_ENABLE;
> 
> +     if (crtc->cmtg.enable)
> +             crtc->cmtg.vrr_ctl = vrr_ctl;
> +
>       intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> vrr_ctl);  }
> 
> --
> 2.29.0

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