On Tue, 03 Feb 2026, Animesh Manna <[email protected]> wrote:
> Enable CMTG through control register.
>
> Signed-off-by: Animesh Manna <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_cmtg.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c
> b/drivers/gpu/drm/i915/display/intel_cmtg.c
> index 3af4aefc760e..f7364c7408d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> @@ -244,6 +244,19 @@ static void intel_cpu_cmtg_transcoder_set_m_n(const
> struct intel_crtc_state *crt
> intel_de_write(display, TRANS_LINKN1_CMTG(cpu_transcoder), m_n->link_n);
> }
>
> +static void intel_cmtg_ctl_enable(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> + u32 val = 0;
> +
> + val = intel_de_read(display, TRANS_CMTG_CTL(cpu_transcoder));
> +
> + val |= CMTG_ENABLE;
> +
> + intel_de_write(display, TRANS_CMTG_CTL(cpu_transcoder), val);
This is just a single line intel_de_rmw().
> +}
> +
> void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> @@ -261,4 +274,7 @@ void intel_cmtg_enable(const struct intel_crtc_state
> *crtc_state)
>
> /* Program Cmtg Sync to Port Sync, TRANS_CMTG_CTL */
> intel_de_rmw(display, TRANS_CMTG_CTL(cpu_transcoder),
> CMTG_SYNC_TO_PORT, CMTG_SYNC_TO_PORT);
> +
> + /* Program Enable Cmtg */
> + intel_cmtg_ctl_enable(crtc_state);
If there's intel_de_rmw() before, why is this a function?
> }
--
Jani Nikula, Intel
