> Subject: [PATCH v3 23/24] drm/i915/lt_phy: Remove LT PHY specific state
> verification
> 
> Remove LT PHY specific state verification as DPLL framework has state
> verification check.
> 
> v2: Reuse intel_lt_phy_pll_compare_hw_state() as only config[0]
>     and config[0] parameters are reliable with LT PHY (Suraj)
> v3: Rephrase handling of LT PHY case when verifying the state (CI)
> 

LGTM,
Reviewed-by: Suraj Kandpal <[email protected]>

> Signed-off-by: Mika Kahola <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 14 +++++--
>  drivers/gpu/drm/i915/display/intel_lt_phy.c   | 39 -------------------
>  drivers/gpu/drm/i915/display/intel_lt_phy.h   |  2 -
>  .../drm/i915/display/intel_modeset_verify.c   |  1 -
>  4 files changed, 11 insertions(+), 45 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 534cc691979f..c3f35250f192 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -5075,6 +5075,7 @@ verify_single_dpll_state(struct intel_display *display,
>                        const struct intel_crtc_state *new_crtc_state)  {
>       struct intel_dpll_hw_state dpll_hw_state = {};
> +     bool pll_mismatch = false;
>       u8 pipe_mask;
>       bool active;
> 
> @@ -5116,9 +5117,16 @@ verify_single_dpll_state(struct intel_display
> *display,
>                                "%s: pll enabled crtcs mismatch (expected
> 0x%x in 0x%x)\n",
>                                pll->info->name, pipe_mask, pll-
> >state.pipe_mask);
> 
> -     if (INTEL_DISPLAY_STATE_WARN(display,
> -                                  pll->on && memcmp(&pll->state.hw_state,
> &dpll_hw_state,
> -                                                    sizeof(dpll_hw_state)),
> +     if (pll->on) {
> +             const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
> +
> +             if (HAS_LT_PHY(display))
> +                     pll_mismatch = !dpll_mgr->compare_hw_state(&pll-
> >state.hw_state, &dpll_hw_state);
> +             else
> +                     pll_mismatch = memcmp(&pll->state.hw_state,
> &dpll_hw_state, sizeof(dpll_hw_state));
> +     }
> +
> +     if (INTEL_DISPLAY_STATE_WARN(display, pll_mismatch,
>                                    "%s: pll hw state mismatch\n",
>                                    pll->info->name)) {
>               struct drm_printer p = drm_dbg_printer(display->drm,
> DRM_UT_KMS, NULL); diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index 746b0182362a..032fd80664c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -2263,45 +2263,6 @@ bool intel_lt_phy_pll_readout_hw_state(struct
> intel_encoder *encoder,
>       return true;
>  }
> 
> -void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
> -                                struct intel_crtc *crtc)
> -{
> -     struct intel_display *display = to_intel_display(state);
> -     struct intel_digital_port *dig_port;
> -     const struct intel_crtc_state *new_crtc_state =
> -             intel_atomic_get_new_crtc_state(state, crtc);
> -     struct intel_encoder *encoder;
> -     struct intel_lt_phy_pll_state pll_hw_state = {};
> -     const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state-
> >dpll_hw_state.ltpll;
> -
> -     if (DISPLAY_VER(display) < 35)
> -             return;
> -
> -     if (!new_crtc_state->hw.active)
> -             return;
> -
> -     /* intel_get_crtc_new_encoder() only works for modeset/fastset
> commits */
> -     if (!intel_crtc_needs_modeset(new_crtc_state) &&
> -         !intel_crtc_needs_fastset(new_crtc_state))
> -             return;
> -
> -     encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
> -     intel_lt_phy_pll_readout_hw_state(encoder, &pll_hw_state);
> -
> -     dig_port = enc_to_dig_port(encoder);
> -     if (intel_tc_port_in_tbt_alt_mode(dig_port))
> -             return;
> -
> -     INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[0] !=
> pll_sw_state->config[0],
> -                              "[CRTC:%d:%s] mismatch in LT PHY PLL
> CONFIG 0: (expected 0x%04x, found 0x%04x)",
> -                              crtc->base.base.id, crtc->base.name,
> -                              pll_sw_state->config[0],
> pll_hw_state.config[0]);
> -     INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[2] !=
> pll_sw_state->config[2],
> -                              "[CRTC:%d:%s] mismatch in LT PHY PLL
> CONFIG 2: (expected 0x%04x, found 0x%04x)",
> -                              crtc->base.base.id, crtc->base.name,
> -                              pll_sw_state->config[2],
> pll_hw_state.config[2]);
> -}
> -
>  void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
>                             struct intel_dpll *pll,
>                             const struct intel_dpll_hw_state *dpll_hw_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h
> b/drivers/gpu/drm/i915/display/intel_lt_phy.h
> index 1c2ec438cd10..8b98997b3107 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.h
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h
> @@ -41,8 +41,6 @@ bool intel_lt_phy_tbt_pll_readout_hw_state(struct
> intel_display *display,
>                                          struct intel_dpll_hw_state
> *hw_state);  bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder
> *encoder,
>                                      struct intel_lt_phy_pll_state 
> *pll_state); -
> void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
> -                                struct intel_crtc *crtc);
>  int
>  intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state,
>                                 u32 frequency_khz);
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> index 12a00121c274..2ec17c2bfe0f 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> @@ -246,7 +246,6 @@ void intel_modeset_verify_crtc(struct
> intel_atomic_state *state,
>       verify_crtc_state(state, crtc);
>       intel_dpll_state_verify(state, crtc);
>       intel_mpllb_state_verify(state, crtc);
> -     intel_lt_phy_pll_state_verify(state, crtc);
>  }
> 
>  void intel_modeset_verify_disabled(struct intel_atomic_state *state)
> --
> 2.43.0

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