> Subject: [PATCH v2 24/24] drm/i915/lt_phy: Enable dpll framework for
> xe3plpd
>
> xe3plpd platform is supported by dpll framework remove a separate check for
> hw comparison and rely solely on dpll framework hw comparison.
>
> Finally, all required hooks are now in place so initialize PLL manager for
> xe3plpd platform and remove the redirections to the legacy code paths for
> clock enable/disable as well as state mismatch checks that are no longer
> needed.
>
> Signed-off-by: Mika Kahola <[email protected]>
Patch 16 need to be moved after this patch according to me
While also making sure that the change in patch 14 where we drop
- /* TODO: Do the readback via intel_compute_shared_dplls() */
- crtc_state->port_clock =
- intel_lt_phy_calc_port_clock(display,
&crtc_state->dpll_hw_state.ltpll);
-
Is not done in that patch
Rest looks good to me
Regards,
Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 31 -------------------
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 7 +++--
> drivers/gpu/drm/i915/display/intel_lt_phy.c | 8 +----
> 4 files changed, 6 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 385d6b26693d..c3cceaf781ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -5285,7 +5285,7 @@ void intel_ddi_init(struct intel_display *display,
> if (HAS_LT_PHY(display)) {
> encoder->enable_clock = intel_xe3plpd_pll_enable_clock;
> encoder->disable_clock = intel_xe3plpd_pll_disable_clock;
> - encoder->port_pll_type = intel_mtl_port_pll_type;
> + encoder->port_pll_type = icl_ddi_tc_port_pll_type;
> if (intel_encoder_is_tc(encoder))
> encoder->get_config = mtl_ddi_tc_phy_get_config;
> else
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d67ec81c0b01..af02a666c3a1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5058,23 +5058,6 @@ static bool allow_vblank_delay_fastset(const
> struct intel_crtc_state *old_crtc_s
> !intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI); }
>
> -static void
> -pipe_config_lt_phy_pll_mismatch(struct drm_printer *p, bool fastset,
> - const struct intel_crtc *crtc,
> - const char *name,
> - const struct intel_lt_phy_pll_state *a,
> - const struct intel_lt_phy_pll_state *b)
> -{
> - char *chipname = "LTPHY";
> -
> - pipe_config_mismatch(p, fastset, crtc, name, chipname);
> -
> - drm_printf(p, "expected:\n");
> - intel_lt_phy_dump_hw_state(p, a);
> - drm_printf(p, "found:\n");
> - intel_lt_phy_dump_hw_state(p, b);
> -}
> -
> bool
> intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> const struct intel_crtc_state *pipe_config, @@ -
> 5189,16 +5172,6 @@ intel_pipe_config_compare(const struct intel_crtc_state
> *current_config,
> } \
> } while (0)
>
> -#define PIPE_CONF_CHECK_PLL_LT(name) do { \
> - if (!intel_lt_phy_pll_compare_hw_state(¤t_config->name, \
> - &pipe_config->name)) { \
> - pipe_config_lt_phy_pll_mismatch(&p, fastset, crtc,
> __stringify(name), \
> - ¤t_config->name, \
> - &pipe_config->name); \
> - ret = false; \
> - } \
> -} while (0)
> -
> #define PIPE_CONF_CHECK_TIMINGS(name) do { \
> PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
> PIPE_CONF_CHECK_I(name.crtc_htotal); \ @@ -5425,10 +5398,6
> @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> if (display->dpll.mgr || HAS_GMCH(display))
> PIPE_CONF_CHECK_PLL(dpll_hw_state);
>
> - /* FIXME convert MTL+ platforms over to dpll_mgr */
> - if (HAS_LT_PHY(display))
> - PIPE_CONF_CHECK_PLL_LT(dpll_hw_state.ltpll);
> -
> PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> PIPE_CONF_CHECK_X(dsi_pll.div);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 63a0469d4e65..c4add325d8d6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4724,7 +4724,6 @@ static bool xe3plpd_compare_hw_state(const
> struct intel_dpll_hw_state *_a,
> return intel_lt_phy_pll_compare_hw_state(a, b); }
>
> -__maybe_unused
> static const struct intel_dpll_mgr xe3plpd_pll_mgr = {
> .dpll_info = xe3plpd_plls,
> .compute_dplls = xe3plpd_compute_dplls, @@ -4750,9 +4749,11 @@
> void intel_dpll_init(struct intel_display *display)
>
> mutex_init(&display->dpll.lock);
>
> - if (DISPLAY_VER(display) >= 35 || display->platform.dg2)
> - /* No shared DPLLs on NVL or DG2; port PLLs are part of the
> PHY */
> + if (display->platform.dg2)
> + /* No shared DPLLs on DG2; port PLLs are part of the PHY */
> dpll_mgr = NULL;
> + else if (DISPLAY_VER(display) >= 35)
> + dpll_mgr = &xe3plpd_pll_mgr;
> else if (DISPLAY_VER(display) >= 14)
> dpll_mgr = &mtl_pll_mgr;
> else if (display->platform.alderlake_p) diff --git
> a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index 032fd80664c6..31669a435582 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -11,6 +11,7 @@
> #include "intel_ddi_buf_trans.h"
> #include "intel_de.h"
> #include "intel_display.h"
> +#include "intel_display_regs.h"
> #include "intel_display_types.h"
> #include "intel_display_utils.h"
> #include "intel_dpll.h"
> @@ -2277,9 +2278,6 @@ void intel_xe3plpd_pll_enable_clock(struct
> intel_encoder *encoder,
>
> if (intel_tc_port_in_tbt_alt_mode(dig_port))
> intel_mtl_tbt_pll_enable_clock(encoder, crtc_state-
> >port_clock);
> - else
> - /* TODO: remove when PLL mgr is in place. */
> - intel_xe3plpd_pll_enable(encoder, NULL, &crtc_state-
> >dpll_hw_state);
> }
>
> void intel_xe3plpd_pll_disable(struct intel_encoder *encoder) @@ -2298,10
> +2296,6 @@ void intel_xe3plpd_pll_disable_clock(struct intel_encoder
> *encoder)
>
> if (intel_tc_port_in_tbt_alt_mode(dig_port))
> intel_mtl_tbt_pll_disable_clock(encoder);
> - else
> - /* TODO: remove when PLL mgr is in place. */
> - intel_xe3plpd_pll_disable(encoder);
> -
> }
>
> static void intel_lt_phy_pll_verify_clock(struct intel_display *display,
> --
> 2.43.0
