QGV points reported from BIOS are not in any sorted order. But the this order cannot be modified as the pcode was expecting the qgv point index on pre display 14 versions. But after the introduction of pmdemand, pcode is expecting the peak bw of the selected qgv point. But because this point is not sorted, we would have to go through all of these points to find any exact match. So sort the qgv point based on the dclk and this sorted order will benefit in all calculations which need to find appropriate qgv point.
Assisted-by: Copilot:claude-sonnet-4.6 Signed-off-by: Vinod Govindapillai <[email protected]> --- drivers/gpu/drm/i915/display/intel_bw.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index e9cfa3edd09e..7b8801a88cb2 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -7,6 +7,8 @@ #include <drm/drm_print.h> #include <drm/intel/intel_pcode_regs.h> +#include <linux/sort.h> + #include "intel_bw.h" #include "intel_crtc.h" #include "intel_de.h" @@ -317,6 +319,20 @@ static int icl_init_qgv_info(struct intel_display *display, return 0; } +static int qgv_point_cmp(const void *a, const void *b) +{ + const struct intel_qgv_point *pa = a; + const struct intel_qgv_point *pb = b; + + return pa->dclk - pb->dclk; +} + +static void intel_sort_qgv_points(struct intel_qgv_info *qi) +{ + sort(qi->points, qi->num_points, sizeof(*qi->points), + qgv_point_cmp, NULL); +} + static int icl_get_qgv_points(struct intel_display *display, const struct dram_info *dram_info, struct intel_qgv_info *qi, @@ -346,6 +362,9 @@ static int icl_get_qgv_points(struct intel_display *display, sp->t_rcd, sp->t_rc); } + if (HAS_PMDEMAND(display)) + intel_sort_qgv_points(qi); + if (qi->num_psf_points > 0) { ret = adls_pcode_read_psf_gv_point_info(display, qi->psf_points); if (ret) { -- 2.43.0
