On Mon, May 18, 2026 at 09:25:01AM +0530, Ankit Nautiyal wrote: > Currently AS SDP is only configured when VRR is enabled. However, other > use cases like CMRR, Panel Replay, etc. also send information to the sink > via AS SDPs. > > With optimized guardband, we also need to account for wakeup time and other > relevant details that depend on the AS SDP position whenever AS SDP is > enabled. If a feature enabling AS SDP gets turned on later (after modeset), > the guardband might not be sufficient and may need to increase, triggering > a full modeset. > > To avoid this, always send AS SDP whenever: > - the source and sink both support it, AND, > - there is a possibility to use it for VRR and Panel Replay for > synchronization. > > v2: Check if AS SDP can be used for synchronization for VRR or PR. (Ville) > > Signed-off-by: Ankit Nautiyal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 69eb474fede7..2c1dbcb0a2ca 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -3181,7 +3181,11 @@ static bool intel_dp_needs_as_sdp(struct intel_dp > *intel_dp, > if (drm_dp_is_branch(intel_dp->dpcd)) > return false; > > - return crtc_state->vrr.enable; > + if (intel_alpm_is_alpm_aux_less(intel_dp, crtc_state) &&
That also includes lobf stuff in the check which we presumably don't want. > + !intel_psr_pr_async_video_timing_supported(intel_dp)) > + return true; > + > + return intel_vrr_possible(crtc_state); > } > > static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, > -- > 2.45.2 -- Ville Syrjälä Intel
